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x-ms-exchange-messagesentrepresentingtype: 1 x-mailer: git-send-email 2.17.1 x-originating-ip: [199.255.44.250] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: da6b8697-652a-4582-c34a-08d6a73735cf x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0;PCL:0;RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600127)(711020)(4605104)(4618075)(2017052603328)(7153060)(7193020);SRVR:DM6PR04MB5643; x-ms-traffictypediagnostic: DM6PR04MB5643: wdcipoutbound: EOP-TRUE x-microsoft-antispam-prvs: x-forefront-prvs: 09749A275C x-forefront-antispam-report: SFV:NSPM;SFS:(10019020)(39860400002)(366004)(136003)(396003)(346002)(376002)(199004)(189003)(102836004)(106356001)(386003)(6506007)(86362001)(66066001)(7736002)(97736004)(305945005)(81156014)(81166006)(105586002)(8676002)(52116002)(44832011)(2616005)(486006)(476003)(99286004)(68736007)(25786009)(6486002)(2171002)(71190400001)(8936002)(6512007)(36756003)(6436002)(4326008)(53936002)(50226002)(186003)(110136005)(478600001)(54906003)(256004)(316002)(14454004)(2906002)(72206003)(26005)(4744005)(3846002)(1076003)(6116002)(71200400001)(5660300002);DIR:OUT;SFP:1102;SCL:1;SRVR:DM6PR04MB5643;H:DM6PR04MB6059.namprd04.prod.outlook.com;FPR:;SPF:None;LANG:en;PTR:InfoNoRecords;A:1;MX:1; x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: MgmM9x1MOR9pPzjmeEccwXvK48LRtqazqBOfhALPBxviefrqA05Wvp/tzFjWTpltP+6ftHCwsZMsh17XRm/a7av7j32U1CPH5DteJ2e4aSY/tSo+IMQqqZa82Oaiu/Zl1Q46lu600fa/t5cCGJ1fmSV2krP6pczmWQLGyz3Xa5RzJKWbKs56jpeY9u8H2jXp/cq9yeC1pbuy4hnURV7Rhd+jEKOPHBomHqNIpNGkwxqlmlWouw+0yN6t7B0nPh3MQeja7oJLm/o2DdaQ/8+7dcYFQEX1mnOI9aEqLIH3ERPrREDBDLbYset8aeOkG56SVy4s8u9UDBwMHH5Wp3JmjQtT8hhihhZEei5oM+tcSVrJbxR0ixNGq8br8fYEq2hTIvNfDhVgcGvm7u9sEHRPi356L/73c+hCwFAyneWh4B0= Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: wdc.com X-MS-Exchange-CrossTenant-Network-Message-Id: da6b8697-652a-4582-c34a-08d6a73735cf X-MS-Exchange-CrossTenant-originalarrivaltime: 12 Mar 2019 22:08:09.7949 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b61c8803-16f3-4c35-9b17-6f65f441df86 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR04MB5643 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Anup Patel This patchset primarily extends initial page table setup using fixmap to boot Linux RISC-V kernel (64bit and 32bit) from any 4KB aligned address. We also add 32bit defconfig to allow people to try 32bit Linux RISC-V kernel as well. The patchset is tested on SiFive Unleashed board and QEMU virt machine. It can also be found in riscv_setup_vm_v1 branch of https//github.com/avpatel/linux.git Anup Patel (3): RISC-V: Add separate defconfig for 32bit systems RISC-V: Make setup_vm() independent of GCC code model RISC-V: Allow booting kernel from any 4KB aligned address arch/riscv/configs/rv32_defconfig | 84 +++++++ arch/riscv/include/asm/fixmap.h | 5 + arch/riscv/include/asm/pgtable-64.h | 5 + arch/riscv/include/asm/pgtable.h | 6 +- arch/riscv/kernel/head.S | 2 + arch/riscv/kernel/setup.c | 4 +- arch/riscv/mm/init.c | 370 +++++++++++++++++++++++----- 7 files changed, 419 insertions(+), 57 deletions(-) create mode 100644 arch/riscv/configs/rv32_defconfig --=20 2.17.1