From: Arnd Bergmann <arnd@arndb.de>
To: stable@vger.kernel.org, Jingoo Han <jingoohan1@gmail.com>,
Joao Pinto <Joao.Pinto@synopsys.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Bjorn Helgaas <bhelgaas@google.com>
Cc: Niklas Cassel <niklas.cassel@axis.com>,
Gustavo Pimentel <gustavo.pimentel@synopsys.com>,
Joao Pinto <jpinto@synopsys.com>, Arnd Bergmann <arnd@arndb.de>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Kishon Vijay Abraham I <kishon@ti.com>,
Sasha Levin <alexander.levin@microsoft.com>,
Jisheng Zhang <Jisheng.Zhang@synaptics.com>,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [BACKPORT 4.14.y 2/8] PCI: designware-ep: dw_pcie_ep_set_msi() should only set MMC bits
Date: Fri, 22 Mar 2019 17:17:17 +0100 [thread overview]
Message-ID: <20190322161727.1153278-3-arnd@arndb.de> (raw)
In-Reply-To: <20190322161727.1153278-1-arnd@arndb.de>
From: Niklas Cassel <niklas.cassel@axis.com>
Previously, dw_pcie_ep_set_msi() wrote all bits in the Message Control
register, thus overwriting the PCI_MSI_FLAGS_64BIT bit.
By clearing the PCI_MSI_FLAGS_64BIT bit, we break MSI
on systems where the RC has set a 64 bit MSI address.
Fix dw_pcie_ep_set_msi() so that it only sets MMC bits.
Tested-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Signed-off-by: Niklas Cassel <niklas.cassel@axis.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Joao Pinto <jpinto@synopsys.com>
(cherry picked from commit 099a95f3591ade29da52131895a3ba9f92a0e82c)
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
drivers/pci/dwc/pcie-designware-ep.c | 4 +++-
drivers/pci/dwc/pcie-designware.h | 1 +
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/pci/dwc/pcie-designware-ep.c b/drivers/pci/dwc/pcie-designware-ep.c
index 7c621877a939..df317d390317 100644
--- a/drivers/pci/dwc/pcie-designware-ep.c
+++ b/drivers/pci/dwc/pcie-designware-ep.c
@@ -214,7 +214,9 @@ static int dw_pcie_ep_set_msi(struct pci_epc *epc, u8 encode_int)
struct dw_pcie_ep *ep = epc_get_drvdata(epc);
struct dw_pcie *pci = to_dw_pcie_from_ep(ep);
- val = (encode_int << MSI_CAP_MMC_SHIFT);
+ val = dw_pcie_readw_dbi(pci, MSI_MESSAGE_CONTROL);
+ val &= ~MSI_CAP_MMC_MASK;
+ val |= (encode_int << MSI_CAP_MMC_SHIFT) & MSI_CAP_MMC_MASK;
dw_pcie_writew_dbi(pci, MSI_MESSAGE_CONTROL, val);
return 0;
diff --git a/drivers/pci/dwc/pcie-designware.h b/drivers/pci/dwc/pcie-designware.h
index 3551dd607b90..5af29d125c7e 100644
--- a/drivers/pci/dwc/pcie-designware.h
+++ b/drivers/pci/dwc/pcie-designware.h
@@ -99,6 +99,7 @@
#define MSI_MESSAGE_CONTROL 0x52
#define MSI_CAP_MMC_SHIFT 1
+#define MSI_CAP_MMC_MASK (7 << MSI_CAP_MMC_SHIFT)
#define MSI_CAP_MME_SHIFT 4
#define MSI_CAP_MSI_EN_MASK 0x1
#define MSI_CAP_MME_MASK (7 << MSI_CAP_MME_SHIFT)
--
2.20.0
next prev parent reply other threads:[~2019-03-22 16:18 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-22 16:17 [BACKPORT 4.14.y 0/8] candidates from spreadtrum 4.14 product kernel Arnd Bergmann
2019-03-22 16:17 ` [BACKPORT 4.14.y 1/8] scsi: ufs: fix wrong command type of UTRD for UFSHCI v2.1 Arnd Bergmann
2019-03-22 16:17 ` Arnd Bergmann [this message]
2019-03-22 16:17 ` [BACKPORT 4.14.y 3/8] PCI: designware-ep: Read-only registers need DBI_RO_WR_EN to be writable Arnd Bergmann
2019-03-22 16:17 ` [BACKPORT 4.14.y 4/8] PCI: endpoint: Use EPC's device in dma_alloc_coherent()/dma_free_coherent() Arnd Bergmann
2019-03-22 16:17 ` [BACKPORT 4.14.y 5/8] rtc: Fix overflow when converting time64_t to rtc_time Arnd Bergmann
2019-03-22 16:17 ` [BACKPORT 4.14.y 6/8] sched/cpufreq/schedutil: Fix error path mutex unlock Arnd Bergmann
2019-03-22 16:17 ` [BACKPORT 4.14.y 7/8] pwm-backlight: Enable/disable the PWM before/after LCD enable toggle Arnd Bergmann
2019-03-22 16:17 ` [BACKPORT 4.14.y 8/8] power: supply: charger-manager: Fix incorrect return value Arnd Bergmann
2019-03-26 2:26 ` [BACKPORT 4.14.y 0/8] candidates from spreadtrum 4.14 product kernel Greg KH
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