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[24.22.235.96]) by smtp.gmail.com with ESMTPSA id 17sm49206730pfw.65.2019.04.05.10.30.13 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 05 Apr 2019 10:30:14 -0700 (PDT) From: Andrey Smirnov To: Shawn Guo Cc: Andrey Smirnov , Lucas Stach , Fabio Estevam , Chris Healy , Leonard Crestez , "A.s. Dong" , Richard Zhu , linux-imx@nxp.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 0/5] PCIE support for i.MX8MQ (DT changes) Date: Fri, 5 Apr 2019 10:29:59 -0700 Message-Id: <20190405173004.13277-1-andrew.smirnov@gmail.com> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Everyone: This series contains all of the i.MX Device Tree changes I made to enable support of PCIe on i.MX8MQ EVK. Feedback is welcome! Changes since [v4]: - Fixed "src" -> "reset-controller" in "arm64: dts: imx8mq: Add a node for SRC IP block" - Collected Reviewed-by for the series from Fabio Changes since [v3]: - Added "num-viewport" to PCIE nodes in "arm64: dts: imx8mq: Add nodes for PCIe IP blocks" - Rebased on latest for-next of i.MX tree - Collected Reviewed-by from Lucas for "arm64: dts: imx8mq-evk: Enable PCIE0 interface" Changes since [v2]: - Fixed various nits pointed out by Lucas - Collected Acked-by and Reviewed-by from Lucas - Moved EVK's WiFi reset pin configuration into a separate pinmux entry. Changes since [v1]: - Dropped unsupported IRQ from PCIe nodes (a leftover from vendor tree) - Added "pcie_aux" clock and moved clock configuration to board file since "pcie_bus" clock is now board specific Thanks, Andrey Smirnov [v1] https://lore.kernel.org/lkml/20190131204333.31846-1-andrew.smirnov@gmail.com/ [v2] https://lore.kernel.org/lkml/20190208002941.30343-1-andrew.smirnov@gmail.com [v3] https://lore.kernel.org/lkml/20190220015857.7136-1-andrew.smirnov@gmail.com/ [v4] https://lore.kernel.org/lkml/20190401022413.6682-1-andrew.smirnov@gmail.com/ Andrey Smirnov (5): arm64: dts: imx8mq: Mark iomuxc_gpr as i.MX6Q compatible arm64: dts: imx8mq: Add a node for SRC IP block arm64: dts: imx8mq: Combine PCIE power domains arm64: dts: imx8mq: Add nodes for PCIe IP blocks arm64: dts: imx8mq-evk: Enable PCIE0 interface arch/arm64/boot/dts/freescale/imx8mq-evk.dts | 42 ++++++++++ arch/arm64/boot/dts/freescale/imx8mq.dtsi | 87 +++++++++++++++++++- 2 files changed, 127 insertions(+), 2 deletions(-) -- 2.20.1