From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.9 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS,UNPARSEABLE_RELAY, URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 02098C04AAB for ; Tue, 7 May 2019 08:14:28 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id D110C214AE for ; Tue, 7 May 2019 08:14:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727269AbfEGIO1 (ORCPT ); Tue, 7 May 2019 04:14:27 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:26959 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1726834AbfEGIOJ (ORCPT ); Tue, 7 May 2019 04:14:09 -0400 X-UUID: 751d7c64f0804984b194681e0461f828-20190507 X-UUID: 751d7c64f0804984b194681e0461f828-20190507 Received: from mtkcas08.mediatek.inc [(172.21.101.126)] by mailgw01.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 1001250080; Tue, 07 May 2019 16:14:00 +0800 Received: from mtkcas08.mediatek.inc (172.21.101.126) by mtkmbs03n2.mediatek.inc (172.21.101.182) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Tue, 7 May 2019 16:13:59 +0800 Received: from mtkslt302.mediatek.inc (10.21.14.115) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Tue, 7 May 2019 16:13:59 +0800 From: Bibby Hsieh To: Jassi Brar , Matthias Brugger , Rob Herring , CK HU CC: Daniel Kurtz , Sascha Hauer , , , , , , Sascha Hauer , Philipp Zabel , Nicolas Boichat , Bibby Hsieh , YT Shen , Daoyuan Huang , Jiaguang Zhang , Dennis-YC Hsieh , Houlong Wei , , , Frederic Chen Subject: [PATCH v5 10/12] soc: mediatek: cmdq: add cmdq_dev_get_subsys function Date: Tue, 7 May 2019 16:13:53 +0800 Message-ID: <20190507081355.52630-11-bibby.hsieh@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20190507081355.52630-1-bibby.hsieh@mediatek.com> References: <20190507081355.52630-1-bibby.hsieh@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-TM-SNTS-SMTP: 5C382A61E4101271C98AFB16536E400739E979680D7ED1C6ED76EF41C3F1BA292000:8 X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org GCE cannot know the register base address, this function can help cmdq client to get the relationship of subsys and register base address. Signed-off-by: Bibby Hsieh --- drivers/soc/mediatek/mtk-cmdq-helper.c | 25 +++++++++++++++++++++++++ include/linux/soc/mediatek/mtk-cmdq.h | 18 ++++++++++++++++++ 2 files changed, 43 insertions(+) diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c b/drivers/soc/mediatek/mtk-cmdq-helper.c index 716f8c4f207b..00636ec995e8 100644 --- a/drivers/soc/mediatek/mtk-cmdq-helper.c +++ b/drivers/soc/mediatek/mtk-cmdq-helper.c @@ -27,6 +27,31 @@ struct cmdq_instruction { u8 op; }; +struct cmdq_subsys *cmdq_dev_get_subsys(struct device *dev, int idx) +{ + struct cmdq_subsys *subsys; + struct of_phandle_args spec; + + subsys = devm_kzalloc(dev, sizeof(*subsys), GFP_KERNEL); + if (!subsys) + return NULL; + + if (of_parse_phandle_with_args(dev->of_node, "mediatek,gce-client-reg", + "#subsys-cells", idx, &spec)) { + dev_err(dev, "can't parse gce-client-reg property"); + + return (struct cmdq_subsys *)-ENODEV; + } + + subsys->id = spec.args[0]; + subsys->offset = spec.args[1]; + subsys->size = spec.args[2]; + of_node_put(spec.np); + + return subsys; +} +EXPORT_SYMBOL(cmdq_dev_get_subsys); + static void cmdq_client_timeout(struct timer_list *t) { struct cmdq_client *client = from_timer(client, t, timer); diff --git a/include/linux/soc/mediatek/mtk-cmdq.h b/include/linux/soc/mediatek/mtk-cmdq.h index 0651a0bffa54..574006c5cd76 100644 --- a/include/linux/soc/mediatek/mtk-cmdq.h +++ b/include/linux/soc/mediatek/mtk-cmdq.h @@ -15,6 +15,12 @@ struct cmdq_pkt; +struct cmdq_subsys { + u8 id; + u16 offset; + u16 size; +}; + struct cmdq_client { spinlock_t lock; u32 pkt_cnt; @@ -142,4 +148,16 @@ int cmdq_pkt_flush_async(struct cmdq_pkt *pkt, cmdq_async_flush_cb cb, */ int cmdq_pkt_flush(struct cmdq_pkt *pkt); +/** + * cmdq_dev_get_subsys() - parse sub system from the device node of CMDQ client + * @dev: device of CMDQ mailbox client + * @idx: the index of desired subsys + * + * Return: CMDQ subsys pointer + * + * Help CMDQ client pasing the sub system number + * from the device node of CMDQ client. + */ +struct cmdq_subsys *cmdq_dev_get_subsys(struct device *dev, int idx); + #endif /* __MTK_CMDQ_H__ */ -- 2.18.0