From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DA76FC31E46 for ; Wed, 12 Jun 2019 07:50:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A109B2063F for ; Wed, 12 Jun 2019 07:50:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2408486AbfFLHuD (ORCPT ); Wed, 12 Jun 2019 03:50:03 -0400 Received: from mga12.intel.com ([192.55.52.136]:41179 "EHLO mga12.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2405233AbfFLHuD (ORCPT ); Wed, 12 Jun 2019 03:50:03 -0400 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 12 Jun 2019 00:50:03 -0700 X-ExtLoop1: 1 Received: from likexu-e5-2699-v4.sh.intel.com ([10.239.48.178]) by orsmga003.jf.intel.com with ESMTP; 12 Jun 2019 00:50:00 -0700 From: Like Xu To: Paolo Bonzini , kvm@vger.kernel.org Cc: Eduardo Habkost , sean.j.christopherson@intel.com, xiaoyao.li@linux.intel.com, =?UTF-8?q?Radim=20Kr=C4=8Dm=C3=A1=C5=99?= , linux-kernel@vger.kernel.org Subject: [PATCH v5] KVM: x86: Add Intel CPUID.1F cpuid emulation support Date: Wed, 12 Jun 2019 15:47:38 +0800 Message-Id: <20190612074738.21309-1-like.xu@linux.intel.com> X-Mailer: git-send-email 2.21.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add support to expose Intel V2 Extended Topology Enumeration Leaf for some new systems with multiple software-visible die within each package. Because unimplemented and unexposed leaves should be explicitly reported as zero, there is no need to limit cpuid.0.eax to the maximum value of feature configuration but limit it to the highest leaf implemented in the current code. A single clamping seems sufficient and cheaper. Reported-by: kbuild test robot Co-developed-by: Xiaoyao Li Signed-off-by: Xiaoyao Li Signed-off-by: Like Xu --- ==changelog== v5: - Fixed sparse warnings: ncompatible types in comparison expression v4: https://lkml.org/lkml/2019/6/5/1029 - Limited cpuid.0.eax to the highest leaf implemented in KVM v3: https://lkml.org/lkml/2019/5/26/64 - Refine commit message and comment v2: https://lkml.org/lkml/2019/4/25/1246 - Apply cpuid.1f check rule on Intel SDM page 3-222 Vol.2A - Add comment to handle 0x1f anf 0xb in common code - Reduce check time in a descending-break style v1: https://lkml.org/lkml/2019/4/22/28 --- arch/x86/kvm/cpuid.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c index e18a9f9f65b5..d0dafaecf05b 100644 --- a/arch/x86/kvm/cpuid.c +++ b/arch/x86/kvm/cpuid.c @@ -426,7 +426,8 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function, switch (function) { case 0: - entry->eax = min(entry->eax, (u32)(f_intel_pt ? 0x14 : 0xd)); + /* Limited to the highest leaf implemented in KVM. */ + entry->eax = min(entry->eax, (u32)0x1f); break; case 1: entry->edx &= kvm_cpuid_1_edx_x86_features; @@ -546,7 +547,11 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function, entry->edx = edx.full; break; } - /* function 0xb has additional index. */ + /* + * Per Intel's SDM, the 0x1f is a superset of 0xb, + * thus they can be handled by common code. + */ + case 0x1f: case 0xb: { int i, level_type; -- 2.21.0