From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.2 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_MUTT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 67685C31E45 for ; Thu, 13 Jun 2019 16:14:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 4A50420665 for ; Thu, 13 Jun 2019 16:14:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2391653AbfFMQOt (ORCPT ); Thu, 13 Jun 2019 12:14:49 -0400 Received: from foss.arm.com ([217.140.110.172]:44866 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731222AbfFMQOs (ORCPT ); Thu, 13 Jun 2019 12:14:48 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 4CDAF367; Thu, 13 Jun 2019 09:14:47 -0700 (PDT) Received: from e121166-lin.cambridge.arm.com (unknown [10.1.196.255]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 4A57A3F694; Thu, 13 Jun 2019 09:14:46 -0700 (PDT) Date: Thu, 13 Jun 2019 17:14:41 +0100 From: Lorenzo Pieralisi To: Remi Pommarel Cc: Thomas Petazzoni , Bjorn Helgaas , Ellie Reeves , linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] PCI: aardvark: Fix PCI_EXP_RTCTL conf register writing Message-ID: <20190613161441.GA2247@e121166-lin.cambridge.arm.com> References: <20190522213351.21366-1-repk@triplefau.lt> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20190522213351.21366-1-repk@triplefau.lt> User-Agent: Mutt/1.9.4 (2018-02-28) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, May 22, 2019 at 11:33:49PM +0200, Remi Pommarel wrote: > PCI_EXP_RTCTL is used to activate PME interrupt only, so writing into it > should not modify other interrupts' mask (such as ISR0). > > Fixes: 6302bf3ef78d ("PCI: Init PCIe feature bits for managed host bridge alloc") > Signed-off-by: Remi Pommarel > --- > Please note that I will unlikely be able to answer any comments from May > 24th to June 10th. > --- > drivers/pci/controller/pci-aardvark.c | 10 +++++++--- > 1 file changed, 7 insertions(+), 3 deletions(-) > > diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c > index 134e0306ff00..27102d3b4f9c 100644 > --- a/drivers/pci/controller/pci-aardvark.c > +++ b/drivers/pci/controller/pci-aardvark.c > @@ -451,10 +451,14 @@ advk_pci_bridge_emul_pcie_conf_write(struct pci_bridge_emul *bridge, > advk_writel(pcie, new, PCIE_CORE_PCIEXP_CAP + reg); > break; > > - case PCI_EXP_RTCTL: > - new = (new & PCI_EXP_RTCTL_PMEIE) << 3; > - advk_writel(pcie, new, PCIE_ISR0_MASK_REG); > + case PCI_EXP_RTCTL: { > + /* Only mask/unmask PME interrupt */ > + u32 val = advk_readl(pcie, PCIE_ISR0_MASK_REG) & > + ~PCIE_MSG_PM_PME_MASK; > + val |= (new & PCI_EXP_RTCTL_PMEIE) << 3; I know you have not introduced this code but maybe we can take an opportunity to clarify it (that << 3 shift obfuscates a bit): u32 val = advk_readl(pcie, PCIE_ISR0_MASK_REG) & ~PCIE_MSG_PM_PME_MASK; if (new & PCI_EXP_RTCTL_PMEIE) val |= PCIE_MSG_PM_PME_MASK; advk_writel(pcie, val, PCIE_ISR0_MASK_REG); break; Or I am not reading the code correctly ? Regardless, I need Thomas' ACK to proceed. Lorenzo > + advk_writel(pcie, val, PCIE_ISR0_MASK_REG); > break; > + } > > case PCI_EXP_RTSTA: > new = (new & PCI_EXP_RTSTA_PME) >> 9; > -- > 2.20.1 >