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[90.63.244.31]) by smtp.gmail.com with ESMTPSA id c2sm2178672wrf.75.2019.06.14.01.58.25 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 14 Jun 2019 01:58:25 -0700 (PDT) From: Neil Armstrong To: balbi@kernel.org Cc: Neil Armstrong , linux-usb@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, Martin Blumenstingl Subject: [PATCH v2] usb: dwc3: meson-g12a: Add support for IRQ based OTG switching Date: Fri, 14 Jun 2019 10:58:24 +0200 Message-Id: <20190614085824.23307-1-narmstrong@baylibre.com> X-Mailer: git-send-email 2.21.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add support for the OTG ID change interrupt to switch between Host and Device mode. Tested on the Hardkernel Odroid-N2 board. Signed-off-by: Neil Armstrong Reviewed-by: Martin Blumenstingl --- drivers/usb/dwc3/dwc3-meson-g12a.c | 36 +++++++++++++++++++++++++----- 1 file changed, 31 insertions(+), 5 deletions(-) diff --git a/drivers/usb/dwc3/dwc3-meson-g12a.c b/drivers/usb/dwc3/dwc3-meson-g12a.c index 2aec31a2eacb..bca7e92a10e9 100644 --- a/drivers/usb/dwc3/dwc3-meson-g12a.c +++ b/drivers/usb/dwc3/dwc3-meson-g12a.c @@ -11,9 +11,7 @@ * - Control registers for each USB2 Ports * - Control registers for the USB PHY layer * - SuperSpeed PHY can be enabled only if port is used - * - * TOFIX: - * - Add dynamic OTG switching with ID change interrupt + * - Dynamic OTG switching with ID change interrupt */ #include @@ -348,6 +346,22 @@ static enum usb_role dwc3_meson_g12a_role_get(struct device *dev) USB_ROLE_HOST : USB_ROLE_DEVICE; } +static irqreturn_t dwc3_meson_g12a_irq_thread(int irq, void *data) +{ + struct dwc3_meson_g12a *priv = data; + enum phy_mode otg_id; + + otg_id = dwc3_meson_g12a_get_id(priv); + if (otg_id != priv->otg_phy_mode) { + if (dwc3_meson_g12a_otg_mode_set(priv, otg_id)) + dev_warn(priv->dev, "Failed to switch OTG mode\n"); + } + + regmap_update_bits(priv->regmap, USB_R5, USB_R5_ID_DIG_IRQ, 0); + + return IRQ_HANDLED; +} + static struct device *dwc3_meson_g12_find_child(struct device *dev, const char *compatible) { @@ -374,7 +388,7 @@ static int dwc3_meson_g12a_probe(struct platform_device *pdev) void __iomem *base; struct resource *res; enum phy_mode otg_id; - int ret, i; + int ret, i, irq; priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); if (!priv) @@ -436,6 +450,19 @@ static int dwc3_meson_g12a_probe(struct platform_device *pdev) /* Get dr_mode */ priv->otg_mode = usb_get_dr_mode(dev); + if (priv->otg_mode == USB_DR_MODE_OTG) { + /* Ack irq before registering */ + regmap_update_bits(priv->regmap, USB_R5, + USB_R5_ID_DIG_IRQ, 0); + + irq = platform_get_irq(pdev, 0); + ret = devm_request_threaded_irq(&pdev->dev, irq, NULL, + dwc3_meson_g12a_irq_thread, + IRQF_ONESHOT, pdev->name, priv); + if (ret) + return ret; + } + dwc3_meson_g12a_usb_init(priv); /* Init PHYs */ @@ -460,7 +487,6 @@ static int dwc3_meson_g12a_probe(struct platform_device *pdev) /* Setup OTG mode corresponding to the ID pin */ if (priv->otg_mode == USB_DR_MODE_OTG) { - /* TOFIX Handle ID mode toggling via IRQ */ otg_id = dwc3_meson_g12a_get_id(priv); if (otg_id != priv->otg_phy_mode) { if (dwc3_meson_g12a_otg_mode_set(priv, otg_id)) -- 2.21.0