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[2003:f1:33d6:2000:a090:336:3445:c98e]) by smtp.googlemail.com with ESMTPSA id 18sm253513wmg.43.2019.07.02.15.33.09 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Tue, 02 Jul 2019 15:33:09 -0700 (PDT) From: Martin Blumenstingl To: blogic@openwrt.org, linus.walleij@linaro.org, bgolaszewski@baylibre.com, linux-gpio@vger.kernel.org Cc: dev@kresin.me, linux-kernel@vger.kernel.org, Martin Blumenstingl Subject: [PATCH 2/4] gpio: stp-xway: improve module clock error handling Date: Wed, 3 Jul 2019 00:32:46 +0200 Message-Id: <20190702223248.31934-3-martin.blumenstingl@googlemail.com> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20190702223248.31934-1-martin.blumenstingl@googlemail.com> References: <20190702223248.31934-1-martin.blumenstingl@googlemail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Three module clock error handling improvements: - use devm_clk_get() so the clock instance can be freed if devm_gpiochip_add_data() fails later on - switch to clk_prepare_enable() so the driver is ready whenever the lantiq target switches to the common clock framework - disable the clock again (using clk_disable_unprepare()) if devm_gpiochip_add_data() All of these are virtually no-ops with the current lantiq target. However, these will be relevant if we switch to the common clock framework. Signed-off-by: Martin Blumenstingl --- drivers/gpio/gpio-stp-xway.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/drivers/gpio/gpio-stp-xway.c b/drivers/gpio/gpio-stp-xway.c index a3326255ce3c..b31e08f84681 100644 --- a/drivers/gpio/gpio-stp-xway.c +++ b/drivers/gpio/gpio-stp-xway.c @@ -256,18 +256,23 @@ static int xway_stp_probe(struct platform_device *pdev) if (!of_find_property(pdev->dev.of_node, "lantiq,rising", NULL)) chip->edge = XWAY_STP_FALLING; - clk = clk_get(&pdev->dev, NULL); + clk = devm_clk_get(&pdev->dev, NULL); if (IS_ERR(clk)) { dev_err(&pdev->dev, "Failed to get clock\n"); return PTR_ERR(clk); } - clk_enable(clk); + + ret = clk_prepare_enable(clk); + if (ret) + return ret; xway_stp_hw_init(chip); ret = devm_gpiochip_add_data(&pdev->dev, &chip->gc, chip); - if (ret) + if (ret) { + clk_disable_unprepare(clk); return ret; + } dev_info(&pdev->dev, "Init done\n"); -- 2.22.0