From: Dmitry Osipenko <digetx@gmail.com>
To: Thierry Reding <thierry.reding@gmail.com>,
Jonathan Hunter <jonathanh@nvidia.com>,
Peter De Schrijver <pdeschrijver@nvidia.com>
Cc: linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH v1 1/2] ARM: tegra: Fix FLOW_CTLR_HALT register clobbering by tegra_resume()
Date: Mon, 8 Jul 2019 02:03:57 +0300 [thread overview]
Message-ID: <20190707230358.10672-2-digetx@gmail.com> (raw)
In-Reply-To: <20190707230358.10672-1-digetx@gmail.com>
There is an unfortunate typo in the code that results in writing to
FLOW_CTLR_HALT instead of FLOW_CTLR_CSR.
Cc: <stable@vger.kernel.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
---
arch/arm/mach-tegra/reset-handler.S | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-tegra/reset-handler.S b/arch/arm/mach-tegra/reset-handler.S
index df44828a34d3..53123ae4ac3b 100644
--- a/arch/arm/mach-tegra/reset-handler.S
+++ b/arch/arm/mach-tegra/reset-handler.S
@@ -44,16 +44,16 @@ ENTRY(tegra_resume)
cmp r6, #TEGRA20
beq 1f @ Yes
/* Clear the flow controller flags for this CPU. */
- cpu_to_csr_reg r1, r0
+ cpu_to_csr_reg r3, r0
mov32 r2, TEGRA_FLOW_CTRL_BASE
- ldr r1, [r2, r1]
+ ldr r1, [r2, r3]
/* Clear event & intr flag */
orr r1, r1, \
#FLOW_CTRL_CSR_INTR_FLAG | FLOW_CTRL_CSR_EVENT_FLAG
movw r0, #0x3FFD @ enable, cluster_switch, immed, bitmaps
@ & ext flags for CPU power mgnt
bic r1, r1, r0
- str r1, [r2]
+ str r1, [r2, r3]
1:
mov32 r9, 0xc09
--
2.22.0
next prev parent reply other threads:[~2019-07-07 23:04 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-07 23:03 [PATCH v1 0/2] Tegra30+ CPU suspend-resume bug-fixes Dmitry Osipenko
2019-07-07 23:03 ` Dmitry Osipenko [this message]
2019-07-07 23:03 ` [PATCH v1 2/2] ARM: tegra: Use WFE for power-gating on Tegra30 Dmitry Osipenko
2019-07-23 1:28 ` [PATCH v1 0/2] Tegra30+ CPU suspend-resume bug-fixes Dmitry Osipenko
2019-07-25 9:40 ` Peter De Schrijver
2019-07-25 13:43 ` Dmitry Osipenko
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