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Wed, 17 Jul 2019 08:47:57 +0000 From: To: , CC: , , , , , , , , Subject: [PATCH 0/5] mtd: spi-nor: write protection at power-up Thread-Topic: [PATCH 0/5] mtd: spi-nor: write protection at power-up Thread-Index: AQHVPHxUB6tYOD3eaEWmYluw6fwWCA== Date: Wed, 17 Jul 2019 08:47:56 +0000 Message-ID: <20190717084745.19322-1-tudor.ambarus@microchip.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: VI1P195CA0085.EURP195.PROD.OUTLOOK.COM (2603:10a6:802:59::38) To BN6PR11MB1842.namprd11.prod.outlook.com (2603:10b6:404:101::18) x-ms-exchange-messagesentrepresentingtype: 1 x-mailer: git-send-email 2.9.5 x-originating-ip: [94.177.32.154] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 0806800c-877d-4cb4-08f9-08d70a9376d4 x-microsoft-antispam: BCL:0;PCL:0;RULEID:(2390118)(7020095)(4652040)(8989299)(5600148)(711020)(4605104)(1401327)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(2017052603328)(7193020);SRVR:BN6SPR00MB254; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-Network-Message-Id: 0806800c-877d-4cb4-08f9-08d70a9376d4 X-MS-Exchange-CrossTenant-originalarrivaltime: 17 Jul 2019 08:47:56.9200 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 3f4057f3-b418-4d4e-ba84-d55b4e897d88 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: tudor.ambarus@microchip.com X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN6SPR00MB254 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Tudor Ambarus There is no functional change intended for the first 2 patches. Patch 3 adds support for the Global Block Unlock command: a single command cycle that unlocks the entire memory array. Patch 4 unlocks the global block protection on sst26vf064b. This is identical with what other nor flashes are doing by clearing the block protection bits from the status register: disable the write protection after a power-on reset cycle. Patch 5 adds a Kconfig option to disable the write protection at power-up. This permits users to choose if they want the write protection at power-up enabled or not. Backward compatibility imposes to disable the write protection at power-up, so the Kconfig option is selected by default. Tudor Ambarus (5): mtd: spi-nor: fix description for int (*flash_is_locked)() mtd: spi-nor: group the code about the write protection at power-up mtd: spi-nor: add Global Block Unlock support mtd: spi-nor: unlock global block protection on sst26vf064b mtd: spi-nor: add Kconfig option to disable write protection at power-up drivers/mtd/spi-nor/Kconfig | 8 ++++++ drivers/mtd/spi-nor/spi-nor.c | 66 ++++++++++++++++++++++++++++++++-------= ---- include/linux/mtd/spi-nor.h | 9 +++--- 3 files changed, 62 insertions(+), 21 deletions(-) --=20 2.9.5