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[216.228.112.22]) by smtp.gmail.com with ESMTPSA id e10sm51619090pfi.173.2019.07.25.10.38.33 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 25 Jul 2019 10:38:34 -0700 (PDT) Date: Thu, 25 Jul 2019 10:39:19 -0700 From: Nicolin Chen To: Daniel Baluta Cc: Daniel Baluta , Linux-ALSA , Viorel Suman , Timur Tabi , Xiubo Li , linuxppc-dev@lists.ozlabs.org, "S.j. Wang" , "Angus Ainslie (Purism)" , Takashi Iwai , Mark Brown , dl-linux-imx , Pengutronix Kernel Team , Fabio Estevam , Linux Kernel Mailing List , Lucas Stach Subject: Re: [alsa-devel] [PATCH 08/10] ASoC: dt-bindings: Document fcomb_mode property Message-ID: <20190725173918.GD31961@Asurada-Nvidia.nvidia.com> References: <20190722124833.28757-1-daniel.baluta@nxp.com> <20190722124833.28757-9-daniel.baluta@nxp.com> <20190724232209.GC6859@Asurada-Nvidia.nvidia.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.9.4 (2018-02-28) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Jul 25, 2019 at 09:02:22AM +0300, Daniel Baluta wrote: > On Thu, Jul 25, 2019 at 2:22 AM Nicolin Chen wrote: > > > > On Mon, Jul 22, 2019 at 03:48:31PM +0300, Daniel Baluta wrote: > > > This allows combining multiple-data-line FIFOs into a > > > single-data-line FIFO. > > > > > > Signed-off-by: Daniel Baluta > > > --- > > > Documentation/devicetree/bindings/sound/fsl-sai.txt | 4 ++++ > > > > This should be sent to devicetree mail-list also. > > > > > 1 file changed, 4 insertions(+) > > > > > > diff --git a/Documentation/devicetree/bindings/sound/fsl-sai.txt b/Documentation/devicetree/bindings/sound/fsl-sai.txt > > > index 59f4d965a5fb..ca27afd840ba 100644 > > > --- a/Documentation/devicetree/bindings/sound/fsl-sai.txt > > > +++ b/Documentation/devicetree/bindings/sound/fsl-sai.txt > > > @@ -54,6 +54,10 @@ Optional properties: > > > represents first data line, bit 1 represents second > > > data line and so on. Data line is enabled if > > > corresponding bit is set to 1. > > > + - fsl,fcomb_mode : list of two integers (first for RX, second for TX) > > > + representing FIFO combine mode. Possible values for > > > + combined mode are: 0 - disabled, 1 - Rx/Tx from shift > > > + registers, 2 - Rx/Tx by software, 3 - both. > > > > Looks like a software configuration to me, instead of a device > > property. Is this configurable by user case, or hard-coded by > > SoC/hardware design? > > Indeed this is a software configuration and configurable by user case. > Will think of a another way to specify it. Yea, it needs to be put somewhere else other than devicetree. Not sure sysfs is a good approach for ASoC components or can be done via amixer control.