From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.7 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, UNPARSEABLE_RELAY,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8D32BC7618B for ; Mon, 29 Jul 2019 07:01:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 6DB3420C01 for ; Mon, 29 Jul 2019 07:01:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727437AbfG2HBu (ORCPT ); Mon, 29 Jul 2019 03:01:50 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:63730 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1727128AbfG2HBW (ORCPT ); Mon, 29 Jul 2019 03:01:22 -0400 X-UUID: ff653d2dcbaf4cd681514c2941f3ab41-20190729 X-UUID: ff653d2dcbaf4cd681514c2941f3ab41-20190729 Received: from mtkexhb02.mediatek.inc [(172.21.101.103)] by mailgw02.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0707 with TLS) with ESMTP id 611002067; Mon, 29 Jul 2019 15:01:16 +0800 Received: from mtkcas09.mediatek.inc (172.21.101.178) by mtkmbs01n2.mediatek.inc (172.21.101.79) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Mon, 29 Jul 2019 15:01:10 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas09.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Mon, 29 Jul 2019 15:01:10 +0800 From: Bibby Hsieh To: Jassi Brar , Matthias Brugger , Rob Herring , CK HU CC: Daniel Kurtz , Sascha Hauer , , , , , , Sascha Hauer , Philipp Zabel , Nicolas Boichat , YT Shen , Daoyuan Huang , Jiaguang Zhang , Dennis-YC Hsieh , Houlong Wei , , Bibby Hsieh Subject: [PATCH v11 12/12] arm64: dts: add gce node for mt8183 Date: Mon, 29 Jul 2019 15:01:06 +0800 Message-ID: <20190729070106.9332-13-bibby.hsieh@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20190729070106.9332-1-bibby.hsieh@mediatek.com> References: <20190729070106.9332-1-bibby.hsieh@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-TM-SNTS-SMTP: 452939164E0A036E79BC4354F5DBF2B0307C990B92DAE3B1B63BCA2416DACB8F2000:8 X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org add gce device node for mt8183 Signed-off-by: Bibby Hsieh --- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index 08274bfcebd8..98d17d0bdebf 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -8,6 +8,7 @@ #include #include #include +#include / { compatible = "mediatek,mt8183"; @@ -212,6 +213,15 @@ clock-names = "spi", "wrap"; }; + gce: gce@10238000 { + compatible = "mediatek,mt8183-gce"; + reg = <0 0x10238000 0 0x4000>; + interrupts = ; + #mbox-cells = <3>; + clocks = <&infracfg CLK_INFRA_GCE>; + clock-names = "gce"; + }; + uart0: serial@11002000 { compatible = "mediatek,mt8183-uart", "mediatek,mt6577-uart"; -- 2.18.0