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[67.185.54.80]) by smtp.gmail.com with ESMTPSA id k64sm16037959pgk.74.2019.08.05.11.57.29 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Mon, 05 Aug 2019 11:57:30 -0700 (PDT) From: Andrey Smirnov To: linux-serial@vger.kernel.org Cc: Andrey Smirnov , Stefan Agner , Chris Healy , Cory Tusar , Lucas Stach , Greg Kroah-Hartman , Jiri Slaby , linux-imx@nxp.com, linux-kernel@vger.kernel.org Subject: [PATCH v3 4/6] tty: serial: fsl_lpuart: Introduce lpuart*_setup_watermark_enable() Date: Mon, 5 Aug 2019 11:56:59 -0700 Message-Id: <20190805185701.22863-5-andrew.smirnov@gmail.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190805185701.22863-1-andrew.smirnov@gmail.com> References: <20190805185701.22863-1-andrew.smirnov@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Most users of lpuart*_setup_watermark() enable identical set of flags right after the call, so combine those two action into a subroutine and make use of it. Signed-off-by: Andrey Smirnov Cc: Stefan Agner Cc: Chris Healy Cc: Cory Tusar Cc: Lucas Stach Cc: Greg Kroah-Hartman Cc: Jiri Slaby Cc: linux-imx@nxp.com Cc: linux-serial@vger.kernel.org Cc: linux-kernel@vger.kernel.org --- drivers/tty/serial/fsl_lpuart.c | 50 ++++++++++++++++++--------------- 1 file changed, 28 insertions(+), 22 deletions(-) diff --git a/drivers/tty/serial/fsl_lpuart.c b/drivers/tty/serial/fsl_lpuart.c index 1286daa1be79..fb9961edce3a 100644 --- a/drivers/tty/serial/fsl_lpuart.c +++ b/drivers/tty/serial/fsl_lpuart.c @@ -1403,6 +1403,17 @@ static void lpuart_setup_watermark(struct lpuart_port *sport) writeb(cr2_saved, sport->port.membase + UARTCR2); } +static void lpuart_setup_watermark_enable(struct lpuart_port *sport) +{ + unsigned char cr2; + + lpuart_setup_watermark(sport); + + cr2 = readb(sport->port.membase + UARTCR2); + cr2 |= UARTCR2_RIE | UARTCR2_TIE | UARTCR2_RE | UARTCR2_TE; + writeb(cr2, sport->port.membase + UARTCR2); +} + static void lpuart32_setup_watermark(struct lpuart_port *sport) { unsigned long val, ctrl; @@ -1428,6 +1439,17 @@ static void lpuart32_setup_watermark(struct lpuart_port *sport) lpuart32_write(&sport->port, ctrl_saved, UARTCTRL); } +static void lpuart32_setup_watermark_enable(struct lpuart_port *sport) +{ + u32 temp; + + lpuart32_setup_watermark(sport); + + temp = lpuart32_read(&sport->port, UARTCTRL); + temp |= UARTCTRL_RE | UARTCTRL_TE | UARTCTRL_ILIE; + lpuart32_write(&sport->port, temp, UARTCTRL); +} + static void rx_dma_timer_init(struct lpuart_port *sport) { timer_setup(&sport->lpuart_timer, lpuart_timer_func, 0); @@ -1488,11 +1510,7 @@ static int lpuart_startup(struct uart_port *port) spin_lock_irqsave(&sport->port.lock, flags); - lpuart_setup_watermark(sport); - - temp = readb(sport->port.membase + UARTCR2); - temp |= UARTCR2_RIE | UARTCR2_TIE | UARTCR2_RE | UARTCR2_TE; - writeb(temp, sport->port.membase + UARTCR2); + lpuart_setup_watermark_enable(sport); lpuart_rx_dma_startup(sport); lpuart_tx_dma_startup(sport); @@ -1538,11 +1556,7 @@ static int lpuart32_startup(struct uart_port *port) spin_lock_irqsave(&sport->port.lock, flags); - lpuart32_setup_watermark(sport); - - temp = lpuart32_read(&sport->port, UARTCTRL); - temp |= UARTCTRL_RE | UARTCTRL_TE | UARTCTRL_ILIE; - lpuart32_write(&sport->port, temp, UARTCTRL); + lpuart32_setup_watermark_enable(sport); lpuart_rx_dma_startup(sport); @@ -2558,22 +2572,14 @@ static int lpuart_resume(struct device *dev) { struct lpuart_port *sport = dev_get_drvdata(dev); bool irq_wake = irqd_is_wakeup_set(irq_get_irq_data(sport->port.irq)); - unsigned long temp; if (sport->port.suspended && !irq_wake) lpuart_enable_clks(sport); - if (lpuart_is_32(sport)) { - lpuart32_setup_watermark(sport); - temp = lpuart32_read(&sport->port, UARTCTRL); - temp |= UARTCTRL_RE | UARTCTRL_TE | UARTCTRL_ILIE; - lpuart32_write(&sport->port, temp, UARTCTRL); - } else { - lpuart_setup_watermark(sport); - temp = readb(sport->port.membase + UARTCR2); - temp |= UARTCR2_RIE | UARTCR2_TIE | UARTCR2_RE | UARTCR2_TE; - writeb(temp, sport->port.membase + UARTCR2); - } + if (lpuart_is_32(sport)) + lpuart32_setup_watermark_enable(sport); + else + lpuart_setup_watermark_enable(sport); if (sport->lpuart_dma_rx_use) { if (irq_wake) { -- 2.21.0