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Wed, 7 Aug 2019 08:26:27 +0000 From: Philippe Schenker To: Marcel Ziswiler , Max Krummenacher , "stefan@agner.ch" , "devicetree@vger.kernel.org" , Rob Herring , Shawn Guo , Mark Rutland , =?iso-8859-2?Q?Michal_Vok=E1=E8?= , Fabio Estevam CC: Philippe Schenker , "linux-kernel@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , Pengutronix Kernel Team , NXP Linux Team , Sascha Hauer Subject: [PATCH v3 11/21] ARM: dts: imx6qdl-apalis: Add sleep state to can interfaces Thread-Topic: [PATCH v3 11/21] ARM: dts: imx6qdl-apalis: Add sleep state to can interfaces Thread-Index: AQHVTPnO2dmXEu4+HUek6D7d0b8AYA== Date: Wed, 7 Aug 2019 08:26:27 +0000 Message-ID: <20190807082556.5013-12-philippe.schenker@toradex.com> References: <20190807082556.5013-1-philippe.schenker@toradex.com> In-Reply-To: <20190807082556.5013-1-philippe.schenker@toradex.com> Accept-Language: en-GB, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: AM4PR0101CA0044.eurprd01.prod.exchangelabs.com (2603:10a6:200:41::12) To VI1PR0502MB3965.eurprd05.prod.outlook.com (2603:10a6:803:23::29) authentication-results: spf=none (sender IP is ) smtp.mailfrom=philippe.schenker@toradex.com; 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received-spf: None (protection.outlook.com: toradex.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: 19siTMFJMY9Dps/wyiMgwlh7Fn7K6XgBJ64tiIi1EOWoOK32nKoQsVSNdtK/GzmcO9hvWAi6aXEsmbi/AJtSkWkLKfzuptdYypYWJyAhLFz/3quQ6B44mrV/56cpEFHu6hG3Cax5sPzPVs/NAv/w9sQPVcgWXFLNsglcU0bQjbe7Nch69nZHd2XZlJ7qqsqeZtRlD43gyAzEaM2DCYjtMwUcfbqlydGMW02954oKAWXPv1d7tX1aXEHP8WGReLbrXpiyey10RRwwgvh2uL1sPRwSDy8z5U4OxeBXiakPdlglITu4W6/6lP0l6QZY6ot8wdLQBmMGq4/Mx3cBotcS/uMRBar6kKs2WmMD0FNcsdEiScm6bhXugxudE38CRvZHZ7z5icBLAsIvkgPMF1Hy+7T64Xc/0ertpdVUF5fK7R0= Content-Type: text/plain; charset="iso-8859-2" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: toradex.com X-MS-Exchange-CrossTenant-Network-Message-Id: 183f6288-914f-43aa-e5df-08d71b10f123 X-MS-Exchange-CrossTenant-originalarrivaltime: 07 Aug 2019 08:26:27.7671 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: d9995866-0d9b-4251-8315-093f062abab4 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: 6EiC3QmQ2QkBSWq6n2I6p/+2KKayhqVZ3QJnEiAapLuzWmCJLa4arvZnt4jP1+ZYaLmpcWZnKIwvv2mVcoy6/ZKOj0umEm31RAsyFr23EOs= X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR0502MB2928 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch prepares the devicetree for the new Ixora V1.2 where we are able to turn off the supply of the can transceiver. This implies to use a sleep state on transmission pins in order to prevent backfeeding. Signed-off-by: Philippe Schenker --- Changes in v3: None Changes in v2: - Changed commit title to '...imx6qdl-apalis:...' arch/arm/boot/dts/imx6qdl-apalis.dtsi | 27 +++++++++++++++++++++------ 1 file changed, 21 insertions(+), 6 deletions(-) diff --git a/arch/arm/boot/dts/imx6qdl-apalis.dtsi b/arch/arm/boot/dts/imx6= qdl-apalis.dtsi index 7c4ad541c3f5..59ed2e4a1fd1 100644 --- a/arch/arm/boot/dts/imx6qdl-apalis.dtsi +++ b/arch/arm/boot/dts/imx6qdl-apalis.dtsi @@ -148,14 +148,16 @@ }; =20 &can1 { - pinctrl-names =3D "default"; - pinctrl-0 =3D <&pinctrl_flexcan1>; + pinctrl-names =3D "default", "sleep"; + pinctrl-0 =3D <&pinctrl_flexcan1_default>; + pinctrl-1 =3D <&pinctrl_flexcan1_sleep>; status =3D "disabled"; }; =20 &can2 { - pinctrl-names =3D "default"; - pinctrl-0 =3D <&pinctrl_flexcan2>; + pinctrl-names =3D "default", "sleep"; + pinctrl-0 =3D <&pinctrl_flexcan2_default>; + pinctrl-1 =3D <&pinctrl_flexcan2_sleep>; status =3D "disabled"; }; =20 @@ -599,19 +601,32 @@ >; }; =20 - pinctrl_flexcan1: flexcan1grp { + pinctrl_flexcan1_default: flexcan1defgrp { fsl,pins =3D < MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x1b0b0 MX6QDL_PAD_GPIO_8__FLEXCAN1_RX 0x1b0b0 >; }; =20 - pinctrl_flexcan2: flexcan2grp { + pinctrl_flexcan1_sleep: flexcan1slpgrp { + fsl,pins =3D < + MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x0 + MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x0 + >; + }; + + pinctrl_flexcan2_default: flexcan2defgrp { fsl,pins =3D < MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x1b0b0 MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b0b0 >; }; + pinctrl_flexcan2_sleep: flexcan2slpgrp { + fsl,pins =3D < + MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x0 + MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x0 + >; + }; =20 pinctrl_gpio_bl_on: gpioblon { fsl,pins =3D < --=20 2.22.0