From: Mark Rutland <mark.rutland@arm.com>
To: Joe Burmeister <joe.burmeister@devtank.co.uk>
Cc: Rob Herring <robh+dt@kernel.org>, Arnd Bergmann <arnd@arndb.de>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Srinivas Kandagatla <srinivas.kandagatla@linaro.org>,
YueHaibing <yuehaibing@huawei.com>,
Bartosz Golaszewski <bgolaszewski@baylibre.com>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] Add optional chip erase functionality to AT25 EEPROM driver.
Date: Fri, 9 Aug 2019 14:54:40 +0100 [thread overview]
Message-ID: <20190809135440.GI48423@lakrids.cambridge.arm.com> (raw)
In-Reply-To: <20190809125358.24440-1-joe.burmeister@devtank.co.uk>
On Fri, Aug 09, 2019 at 01:53:55PM +0100, Joe Burmeister wrote:
> Many, though not all, AT25s have an instruction for chip erase.
> If there is one in the datasheet, it can be added to device tree.
> Erase can then be done in userspace via the sysfs API with a new
> "erase" device attribute. This matches the eeprom_93xx46 driver's
> "erase".
>
> Signed-off-by: Joe Burmeister <joe.burmeister@devtank.co.uk>
> ---
> .../devicetree/bindings/eeprom/at25.txt | 2 +
> drivers/misc/eeprom/at25.c | 83 ++++++++++++++++++-
> 2 files changed, 82 insertions(+), 3 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/eeprom/at25.txt b/Documentation/devicetree/bindings/eeprom/at25.txt
> index b3bde97dc199..c65d11e14c7a 100644
> --- a/Documentation/devicetree/bindings/eeprom/at25.txt
> +++ b/Documentation/devicetree/bindings/eeprom/at25.txt
> @@ -19,6 +19,7 @@ Optional properties:
> - spi-cpha : SPI shifted clock phase, as per spi-bus bindings.
> - spi-cpol : SPI inverse clock polarity, as per spi-bus bindings.
> - read-only : this parameter-less property disables writes to the eeprom
> +- chip_erase_instruction : Chip erase instruction for this AT25, often 0xc7 or 0x62.
This should be using '-' rather than '_', as per general DT conventions
and as with the existing properties.
> Obsolete legacy properties can be used in place of "size", "pagesize",
> "address-width", and "read-only":
> @@ -39,4 +40,5 @@ Example:
> pagesize = <64>;
> size = <32768>;
> address-width = <16>;
> + chip_erase_instruction = <0x62>;
[...]
> + /* Optional chip erase instruction */
> + device_property_read_u8(&spi->dev, "chip_erase_instruction", &at25->erase_instr);
This will not behave as you expect, since you didn't mark the property as
8-bits.
Read this as a u32 into the existing val temporary variable, as is done
for pagesize. You can add a warnign if it's out-of-range.
Thanks,
Mark.
next prev parent reply other threads:[~2019-08-09 13:54 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-09 12:53 Joe Burmeister
2019-08-09 13:00 ` Greg Kroah-Hartman
2019-08-09 13:18 ` Joe Burmeister
2019-08-09 13:28 ` Greg Kroah-Hartman
2019-08-09 13:54 ` Mark Rutland [this message]
2019-08-09 16:28 ` Joe Burmeister
2019-08-12 15:51 ` David Laight
2019-08-12 21:03 ` Joe Burmeister
2019-08-21 21:21 ` Rob Herring
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