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From: Christoph Hellwig <hch@lst.de>
To: Atish Patra <atish.patra@wdc.com>
Cc: linux-kernel@vger.kernel.org, Albert Ou <aou@eecs.berkeley.edu>,
	linux-riscv@lists.infradead.org,
	Palmer Dabbelt <palmer@sifive.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Christoph Hellwig <hch@lst.de>, Anup Patel <Anup.Patel@wdc.com>,
	Andreas Schwab <schwab@linux-m68k.org>
Subject: Re: [PATCH v3 1/3] RISC-V: Issue a local tlbflush if possible.
Date: Thu, 22 Aug 2019 03:46:42 +0200	[thread overview]
Message-ID: <20190822014642.GA11922@lst.de> (raw)
In-Reply-To: <20190822004644.25829-2-atish.patra@wdc.com>

On Wed, Aug 21, 2019 at 05:46:42PM -0700, Atish Patra wrote:
> In RISC-V, tlb flush happens via SBI which is expensive. If the local
> cpu is the only cpu in cpumask, there is no need to invoke a SBI call.
> 
> Just do a local flush and return.
> 
> Signed-off-by: Atish Patra <atish.patra@wdc.com>
> ---
>  arch/riscv/mm/tlbflush.c | 15 +++++++++++++++
>  1 file changed, 15 insertions(+)
> 
> diff --git a/arch/riscv/mm/tlbflush.c b/arch/riscv/mm/tlbflush.c
> index df93b26f1b9d..36430ee3bed9 100644
> --- a/arch/riscv/mm/tlbflush.c
> +++ b/arch/riscv/mm/tlbflush.c
> @@ -2,6 +2,7 @@
>  
>  #include <linux/mm.h>
>  #include <linux/smp.h>
> +#include <linux/sched.h>
>  #include <asm/sbi.h>
>  
>  void flush_tlb_all(void)
> @@ -13,9 +14,23 @@ static void __sbi_tlb_flush_range(struct cpumask *cmask, unsigned long start,
>  		unsigned long size)
>  {
>  	struct cpumask hmask;
> +	unsigned int cpuid = get_cpu();
>  
> +	if (!cmask) {
> +		riscv_cpuid_to_hartid_mask(cpu_online_mask, &hmask);
> +		goto issue_sfence;
> +	}
> +
> +	if (cpumask_test_cpu(cpuid, cmask) && cpumask_weight(cmask) == 1) {
> +		local_flush_tlb_all();
> +		goto done;
> +	}

I think a single core on a SMP kernel is a valid enough use case given
how litte distros still have UP kernels.  So Maybe this shiuld rather be:

	if (!cmask)
		cmask = cpu_online_mask;

	if (cpumask_test_cpu(cpuid, cmask) && cpumask_weight(cmask) == 1) {
		local_flush_tlb_all();
	} else {
	 	riscv_cpuid_to_hartid_mask(cmask, &hmask);
	  	sbi_remote_sfence_vma(hmask.bits, start, size);
	}

  reply	other threads:[~2019-08-22  1:46 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-08-22  0:46 [PATCH v3 0/3] Optimize tlbflush path Atish Patra
2019-08-22  0:46 ` [PATCH v3 1/3] RISC-V: Issue a local tlbflush if possible Atish Patra
2019-08-22  1:46   ` Christoph Hellwig [this message]
2019-08-22  4:01     ` Atish Patra
2019-08-22  4:27       ` hch
2019-08-22  5:39         ` Atish Patra
2019-08-22  0:46 ` [PATCH v3 2/3] RISC-V: Issue a tlb page flush " Atish Patra
2019-08-22  1:50   ` Christoph Hellwig
2019-08-22  4:02     ` Atish Patra
2019-08-22  0:46 ` [PATCH v3 3/3] RISC-V: Do not invoke SBI call if cpumask is empty Atish Patra
2019-08-22  1:51   ` Christoph Hellwig
2019-08-22  4:23     ` Atish Patra

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