From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B4A27C3A5A2 for ; Sat, 24 Aug 2019 00:32:40 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 89A8C21670 for ; Sat, 24 Aug 2019 00:32:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726586AbfHXAcj (ORCPT ); Fri, 23 Aug 2019 20:32:39 -0400 Received: from metis.ext.pengutronix.de ([85.220.165.71]:46985 "EHLO metis.ext.pengutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725917AbfHXAcj (ORCPT ); Fri, 23 Aug 2019 20:32:39 -0400 Received: from pty.hi.pengutronix.de ([2001:67c:670:100:1d::c5]) by metis.ext.pengutronix.de with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1i1Jyo-0005cG-K9; Sat, 24 Aug 2019 02:32:30 +0200 Received: from ukl by pty.hi.pengutronix.de with local (Exim 4.89) (envelope-from ) id 1i1Jyn-0000KD-TO; Sat, 24 Aug 2019 02:32:29 +0200 Date: Sat, 24 Aug 2019 02:32:29 +0200 From: Uwe =?iso-8859-1?Q?Kleine-K=F6nig?= To: Sam Shih Cc: Rob Herring , Mark Rutland , Matthias Brugger , Thierry Reding , Ryder Lee , John Crispin , linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: Re: [PATCH v5 03/13] pwm: mediatek: add a property "clock-frequency" Message-ID: <20190824003229.7uch4m54vrxlt7uj@pengutronix.de> References: <1566457123-20791-1-git-send-email-sam.shih@mediatek.com> <1566457123-20791-4-git-send-email-sam.shih@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <1566457123-20791-4-git-send-email-sam.shih@mediatek.com> User-Agent: NeoMutt/20170113 (1.7.2) X-SA-Exim-Connect-IP: 2001:67c:670:100:1d::c5 X-SA-Exim-Mail-From: ukl@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hello Sam, On Thu, Aug 22, 2019 at 02:58:33PM +0800, Sam Shih wrote: > This fix mt7628 pwm during configure from userspace. The SoC > is legacy MIPS and has no complex clock tree. This patch add property > clock-frequency to the SoC specific data and legacy MIPS SoC need to > configure it in DT. This property is use for period calculation. > > We will improve this fix by droping has-clks attribute and using > clock-frequency to do the same thing in a new patch. > > Signed-off-by: Ryder Lee > Signed-off-by: Sam Shih I wonder if instead the platform could provide some dummy and optional clocks. You could add a fixed-clock for the clk that is used to determine the clock rate and switch to devm_clk_get_optional for the others. Best regards Uwe -- Pengutronix e.K. | Uwe Kleine-König | Industrial Linux Solutions | http://www.pengutronix.de/ |