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Mon, 26 Aug 2019 11:58:45 +0000 From: To: , , , , , , CC: Subject: [PATCH v3 02/20] mtd: spi-nor: Use nor->params Thread-Topic: [PATCH v3 02/20] mtd: spi-nor: Use nor->params Thread-Index: AQHVXAWdFmiGe/+EPUWdynB8W5OYxQ== Date: Mon, 26 Aug 2019 11:58:45 +0000 Message-ID: <20190826115833.14913-3-tudor.ambarus@microchip.com> References: <20190826115833.14913-1-tudor.ambarus@microchip.com> In-Reply-To: <20190826115833.14913-1-tudor.ambarus@microchip.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: VI1PR09CA0095.eurprd09.prod.outlook.com (2603:10a6:803:78::18) To MN2PR11MB4448.namprd11.prod.outlook.com (2603:10b6:208:193::29) x-ms-exchange-messagesentrepresentingtype: 1 x-mailer: git-send-email 2.9.5 x-originating-ip: [94.177.32.156] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: d33026e4-164c-4869-981c-08d72a1cbf60 x-microsoft-antispam: BCL:0;PCL:0;RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600166)(711020)(4605104)(1401327)(2017052603328)(7193020);SRVR:MN2PR11MB4350; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-Network-Message-Id: d33026e4-164c-4869-981c-08d72a1cbf60 X-MS-Exchange-CrossTenant-originalarrivaltime: 26 Aug 2019 11:58:45.6412 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 3f4057f3-b418-4d4e-ba84-d55b4e897d88 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: S3/Dbsc/gUrwZTDf3r2jIKoHggBnbrGxyFoMWEQnV58iDy4LJ8e+wqpQwSgVgpEoVJNEd6r+2tP+I87yjRsacR0Vx+l+wfqSLRmQSPCcJ+I= X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR11MB4350 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Tudor Ambarus The Flash parameters and settings are now stored in 'struct spi_nor'. Use this instead of the stack allocated params. Few functions stop passing pointer to params, as they can get it from 'struct spi_nor'. spi_nor_parse_sfdp() and children will keep passing pointer to params because of the roll-back mechanism: in case the parsing of SFDP fails, the legacy flash parameter and settings will be restored. Zeroing params is no longer needed because all SPI NOR users kzalloc 'struct spi_nor'. Signed-off-by: Tudor Ambarus Reviewed-by: Boris Brezillon --- v3: collect R-b drivers/mtd/spi-nor/spi-nor.c | 46 ++++++++++++++++++---------------------= ---- 1 file changed, 19 insertions(+), 27 deletions(-) diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c index d35dc6a97521..e9b9cd70a999 100644 --- a/drivers/mtd/spi-nor/spi-nor.c +++ b/drivers/mtd/spi-nor/spi-nor.c @@ -2974,16 +2974,13 @@ static int spi_nor_spimem_check_pp(struct spi_nor *= nor, * spi_nor_spimem_adjust_hwcaps - Find optimal Read/Write protocol * based on SPI controller capabilities * @nor: pointer to a 'struct spi_nor' - * @params: pointer to the 'struct spi_nor_flash_parameter' - * representing SPI NOR flash capabilities * @hwcaps: pointer to resulting capabilities after adjusting * according to controller and flash's capability */ static void -spi_nor_spimem_adjust_hwcaps(struct spi_nor *nor, - const struct spi_nor_flash_parameter *params, - u32 *hwcaps) +spi_nor_spimem_adjust_hwcaps(struct spi_nor *nor, u32 *hwcaps) { + struct spi_nor_flash_parameter *params =3D &nor->params; unsigned int cap; =20 /* DTR modes are not supported yet, mask them all. */ @@ -4129,16 +4126,13 @@ static int spi_nor_parse_sfdp(struct spi_nor *nor, return err; } =20 -static int spi_nor_init_params(struct spi_nor *nor, - struct spi_nor_flash_parameter *params) +static int spi_nor_init_params(struct spi_nor *nor) { + struct spi_nor_flash_parameter *params =3D &nor->params; struct spi_nor_erase_map *map =3D &nor->erase_map; const struct flash_info *info =3D nor->info; u8 i, erase_mask; =20 - /* Set legacy flash parameters as default. */ - memset(params, 0, sizeof(*params)); - /* Set SPI NOR sizes. */ params->size =3D (u64)info->sector_size * info->n_sectors; params->page_size =3D info->page_size; @@ -4255,7 +4249,6 @@ static int spi_nor_init_params(struct spi_nor *nor, } =20 static int spi_nor_select_read(struct spi_nor *nor, - const struct spi_nor_flash_parameter *params, u32 shared_hwcaps) { int cmd, best_match =3D fls(shared_hwcaps & SNOR_HWCAPS_READ_MASK) - 1; @@ -4268,7 +4261,7 @@ static int spi_nor_select_read(struct spi_nor *nor, if (cmd < 0) return -EINVAL; =20 - read =3D ¶ms->reads[cmd]; + read =3D &nor->params.reads[cmd]; nor->read_opcode =3D read->opcode; nor->read_proto =3D read->proto; =20 @@ -4287,7 +4280,6 @@ static int spi_nor_select_read(struct spi_nor *nor, } =20 static int spi_nor_select_pp(struct spi_nor *nor, - const struct spi_nor_flash_parameter *params, u32 shared_hwcaps) { int cmd, best_match =3D fls(shared_hwcaps & SNOR_HWCAPS_PP_MASK) - 1; @@ -4300,7 +4292,7 @@ static int spi_nor_select_pp(struct spi_nor *nor, if (cmd < 0) return -EINVAL; =20 - pp =3D ¶ms->page_programs[cmd]; + pp =3D &nor->params.page_programs[cmd]; nor->program_opcode =3D pp->opcode; nor->write_proto =3D pp->proto; return 0; @@ -4407,9 +4399,9 @@ static int spi_nor_select_erase(struct spi_nor *nor, = u32 wanted_size) } =20 static int spi_nor_setup(struct spi_nor *nor, - const struct spi_nor_flash_parameter *params, const struct spi_nor_hwcaps *hwcaps) { + struct spi_nor_flash_parameter *params =3D &nor->params; u32 ignored_mask, shared_mask; bool enable_quad_io; int err; @@ -4426,7 +4418,7 @@ static int spi_nor_setup(struct spi_nor *nor, * need to discard some of them based on what the SPI * controller actually supports (using spi_mem_supports_op()). */ - spi_nor_spimem_adjust_hwcaps(nor, params, &shared_mask); + spi_nor_spimem_adjust_hwcaps(nor, &shared_mask); } else { /* * SPI n-n-n protocols are not supported when the SPI @@ -4442,7 +4434,7 @@ static int spi_nor_setup(struct spi_nor *nor, } =20 /* Select the (Fast) Read command. */ - err =3D spi_nor_select_read(nor, params, shared_mask); + err =3D spi_nor_select_read(nor, shared_mask); if (err) { dev_err(nor->dev, "can't select read settings supported by both the SPI controller and me= mory.\n"); @@ -4450,7 +4442,7 @@ static int spi_nor_setup(struct spi_nor *nor, } =20 /* Select the Page Program command. */ - err =3D spi_nor_select_pp(nor, params, shared_mask); + err =3D spi_nor_select_pp(nor, shared_mask); if (err) { dev_err(nor->dev, "can't select write settings supported by both the SPI controller and m= emory.\n"); @@ -4553,11 +4545,11 @@ static const struct flash_info *spi_nor_match_id(co= nst char *name) int spi_nor_scan(struct spi_nor *nor, const char *name, const struct spi_nor_hwcaps *hwcaps) { - struct spi_nor_flash_parameter params; const struct flash_info *info =3D NULL; struct device *dev =3D nor->dev; struct mtd_info *mtd =3D &nor->mtd; struct device_node *np =3D spi_nor_get_flash_node(nor); + struct spi_nor_flash_parameter *params =3D &nor->params; int ret; int i; =20 @@ -4639,7 +4631,7 @@ int spi_nor_scan(struct spi_nor *nor, const char *nam= e, nor->clear_sr_bp =3D spi_nor_clear_sr_bp; =20 /* Parse the Serial Flash Discoverable Parameters table. */ - ret =3D spi_nor_init_params(nor, ¶ms); + ret =3D spi_nor_init_params(nor); if (ret) return ret; =20 @@ -4649,7 +4641,7 @@ int spi_nor_scan(struct spi_nor *nor, const char *nam= e, mtd->type =3D MTD_NORFLASH; mtd->writesize =3D 1; mtd->flags =3D MTD_CAP_NORFLASH; - mtd->size =3D params.size; + mtd->size =3D params->size; mtd->_erase =3D spi_nor_erase; mtd->_read =3D spi_nor_read; mtd->_resume =3D spi_nor_resume; @@ -4688,18 +4680,18 @@ int spi_nor_scan(struct spi_nor *nor, const char *n= ame, mtd->flags |=3D MTD_NO_ERASE; =20 mtd->dev.parent =3D dev; - nor->page_size =3D params.page_size; + nor->page_size =3D params->page_size; mtd->writebufsize =3D nor->page_size; =20 if (np) { /* If we were instantiated by DT, use it */ if (of_property_read_bool(np, "m25p,fast-read")) - params.hwcaps.mask |=3D SNOR_HWCAPS_READ_FAST; + params->hwcaps.mask |=3D SNOR_HWCAPS_READ_FAST; else - params.hwcaps.mask &=3D ~SNOR_HWCAPS_READ_FAST; + params->hwcaps.mask &=3D ~SNOR_HWCAPS_READ_FAST; } else { /* If we weren't instantiated by DT, default to fast-read */ - params.hwcaps.mask |=3D SNOR_HWCAPS_READ_FAST; + params->hwcaps.mask |=3D SNOR_HWCAPS_READ_FAST; } =20 if (of_property_read_bool(np, "broken-flash-reset")) @@ -4707,7 +4699,7 @@ int spi_nor_scan(struct spi_nor *nor, const char *nam= e, =20 /* Some devices cannot do fast-read, no matter what DT tells us */ if (info->flags & SPI_NOR_NO_FR) - params.hwcaps.mask &=3D ~SNOR_HWCAPS_READ_FAST; + params->hwcaps.mask &=3D ~SNOR_HWCAPS_READ_FAST; =20 /* * Configure the SPI memory: @@ -4716,7 +4708,7 @@ int spi_nor_scan(struct spi_nor *nor, const char *nam= e, * - set the SPI protocols for register and memory accesses. * - set the Quad Enable bit if needed (required by SPI x-y-4 protos). */ - ret =3D spi_nor_setup(nor, ¶ms, hwcaps); + ret =3D spi_nor_setup(nor, hwcaps); if (ret) return ret; =20 --=20 2.9.5