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Tue, 27 Aug 2019 13:18:21 +0000 From: Philippe Schenker To: Marcel Ziswiler , Max Krummenacher , "stefan @ agner . ch" , "devicetree @ vger . kernel . org" , Rob Herring , Shawn Guo , Mark Rutland , =?iso-8859-2?Q?Michal_Vok=E1=E8?= , Fabio Estevam CC: Stefan Agner , Philippe Schenker , "linux-kernel@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , Pengutronix Kernel Team , NXP Linux Team , Sascha Hauer Subject: [PATCH v5 02/13] ARM: dts: imx7-colibri: fix 1.8V/UHS support Thread-Topic: [PATCH v5 02/13] ARM: dts: imx7-colibri: fix 1.8V/UHS support Thread-Index: AQHVXNnlxGs20PyAuUCUZYQriV3PlQ== Date: Tue, 27 Aug 2019 13:18:20 +0000 Message-ID: <20190827131806.6816-3-philippe.schenker@toradex.com> References: <20190827131806.6816-1-philippe.schenker@toradex.com> In-Reply-To: <20190827131806.6816-1-philippe.schenker@toradex.com> Accept-Language: en-GB, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: AM0PR0102CA0031.eurprd01.prod.exchangelabs.com (2603:10a6:208:14::44) To VI1PR0502MB3965.eurprd05.prod.outlook.com (2603:10a6:803:23::29) authentication-results: spf=none (sender IP is ) smtp.mailfrom=philippe.schenker@toradex.com; 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received-spf: None (protection.outlook.com: toradex.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: 3qBUY8ebj9ajY/huKckGvdZenjDnvq5Vr3BEm0kwdf1U3Gd7HsabHOuo0XRXkulcZFWW3slcSrIB3QgXJtLAW23iZVO/2xK0eJTh5MVUiU4mDXpF83s4ePuRm4cOQmKnvtG9410KAP/ASZUpqFPfWPd9JgtFtFwsFa8ByCUMPz+BAUwoYSGFgBAHK4CzuV4P3kat9AmbgDbzGYKvXDKQ16mRqaF68uUa+3AB69EfKHguhM64Q9tJxTIxByDAeFGwDKopLQuZu/6TPUzaaBOtbz3hv6Es9ywcWxDEJ1LoDkLzw0s6kxkqY+bktWzueNZ/LZFCe6cRpXHjtrAtwmb78WGCZe9hDL4ubC1vNumgd4gBlZGBNap2eLbbdT9dOx6qvQee80VkmF6VWasEjohpQyt5srXyuEnwaTLxu7xeFN8= Content-Type: text/plain; charset="iso-8859-2" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: toradex.com X-MS-Exchange-CrossTenant-Network-Message-Id: fb227d67-8966-4dd6-8f66-08d72af10813 X-MS-Exchange-CrossTenant-originalarrivaltime: 27 Aug 2019 13:18:21.0057 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: d9995866-0d9b-4251-8315-093f062abab4 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: 9bwiY8eFjXKyBHmVdSDaYiNah0y/N08TANfZo8255zyqciOq6XcD3rhuNkdjyJfUEUPgZ+Xq5jWITpOWstF3kyX9uT6LV7QpuF7bhIstInk= X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR0502MB3872 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Stefan Agner Add pinmuxing and do not specify voltage restrictions for the usdhc instance available on the modules edge connector. This allows to use SD-cards with higher transfer modes if supported by the carrier board. Signed-off-by: Stefan Agner Signed-off-by: Philippe Schenker Acked-by: Marcel Ziswiler --- Changes in v5: None Changes in v4: - Add Marcel Ziswiler's Ack Changes in v3: - Add new commit message from Stefan's proposal on ML Changes in v2: None arch/arm/boot/dts/imx7-colibri.dtsi | 23 ++++++++++++++++++++++- 1 file changed, 22 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-c= olibri.dtsi index b72940e7d00b..cbcb97886e80 100644 --- a/arch/arm/boot/dts/imx7-colibri.dtsi +++ b/arch/arm/boot/dts/imx7-colibri.dtsi @@ -304,7 +304,6 @@ &usdhc1 { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_usdhc1 &pinctrl_cd_usdhc1>; - no-1-8-v; cd-gpios =3D <&gpio1 0 GPIO_ACTIVE_LOW>; disable-wp; vqmmc-supply =3D <®_LDO2>; @@ -612,6 +611,28 @@ >; }; =20 + pinctrl_usdhc1_100mhz: usdhc1grp_100mhz { + fsl,pins =3D < + MX7D_PAD_SD1_CMD__SD1_CMD 0x5a + MX7D_PAD_SD1_CLK__SD1_CLK 0x1a + MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5a + MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5a + MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5a + MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5a + >; + }; + + pinctrl_usdhc1_200mhz: usdhc1grp_200mhz { + fsl,pins =3D < + MX7D_PAD_SD1_CMD__SD1_CMD 0x5b + MX7D_PAD_SD1_CLK__SD1_CLK 0x1b + MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5b + MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5b + MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5b + MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5b + >; + }; + pinctrl_usdhc3: usdhc3grp { fsl,pins =3D < MX7D_PAD_SD3_CMD__SD3_CMD 0x59 --=20 2.23.0