From: Douglas Anderson <dianders@chromium.org>
To: Heiko Stuebner <heiko@sntech.de>
Cc: mka@chromium.org, Douglas Anderson <dianders@chromium.org>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-rockchip@lists.infradead.org,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH] ARM: dts: rockchip: Add cpu id to rk3288 efuse node
Date: Thu, 19 Sep 2019 14:26:41 -0700 [thread overview]
Message-ID: <20190919142611.1.I309434f00a2a9be71e4437991fe08abc12f06e2e@changeid> (raw)
This just adds in another field of what's stored in the e-fuse on
rk3288. Though I can't personally promise that every rk3288 out there
has the CPU ID stored in the eFuse at this location, there is some
evidence that it is correct:
- This matches what was in the Chrome OS 3.14 branch (see
EFUSE_CHIP_UID_OFFSET and EFUSE_CHIP_UID_LEN) for rk3288.
- The upstream rk3399 dts file has this same data at the same offset
and with the same length, indiciating that this is likely common for
several modern Rockchip SoCs.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
---
arch/arm/boot/dts/rk3288.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index cc893e154fe5..415b48fc3ce8 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -1391,6 +1391,9 @@
clocks = <&cru PCLK_EFUSE256>;
clock-names = "pclk_efuse";
+ cpu_id: cpu-id@7 {
+ reg = <0x07 0x10>;
+ };
cpu_leakage: cpu_leakage@17 {
reg = <0x17 0x1>;
};
--
2.23.0.351.gc4317032e6-goog
next reply other threads:[~2019-09-19 21:27 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-19 21:26 Douglas Anderson [this message]
2019-09-29 14:24 ` Heiko Stuebner
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