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Tue, 24 Sep 2019 07:46:47 +0000 From: To: , , , , , CC: , , , , , , , , , , , , Subject: [PATCH v2 17/22] mtd: spi-nor: Check all the bits written, not just the BP ones Thread-Topic: [PATCH v2 17/22] mtd: spi-nor: Check all the bits written, not just the BP ones Thread-Index: AQHVcqw3dowCcvyq1024oXdWsYKuzA== Date: Tue, 24 Sep 2019 07:46:47 +0000 Message-ID: <20190924074533.6618-18-tudor.ambarus@microchip.com> References: <20190924074533.6618-1-tudor.ambarus@microchip.com> In-Reply-To: <20190924074533.6618-1-tudor.ambarus@microchip.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: VI1PR0101CA0082.eurprd01.prod.exchangelabs.com (2603:10a6:800:1f::50) To MN2PR11MB4448.namprd11.prod.outlook.com (2603:10b6:208:193::29) x-ms-exchange-messagesentrepresentingtype: 1 x-mailer: git-send-email 2.9.5 x-originating-ip: [94.177.32.156] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 2716c3aa-20ab-484f-179a-08d740c35a48 x-microsoft-antispam: BCL:0;PCL:0;RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600167)(711020)(4605104)(1401327)(2017052603328)(7193020);SRVR:MN2PR11MB4319; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-Network-Message-Id: 2716c3aa-20ab-484f-179a-08d740c35a48 X-MS-Exchange-CrossTenant-originalarrivaltime: 24 Sep 2019 07:46:47.4928 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 3f4057f3-b418-4d4e-ba84-d55b4e897d88 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: Ut9AA2x27VUnXW19LO2+fdN4H6JIbNKf8hUIPZgYHdhwxg6FoF0VR+T65SN8c4cO8g64URejucS9ViolC4Nbt5wPKQdDr7l7I+R2y9cVndU= X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR11MB4319 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Tudor Ambarus Check that all the bits written in the write_sr_and_check() method match the status_new received value. Failing to write the other bits is dangerous too, extend the check. Signed-off-by: Tudor Ambarus --- drivers/mtd/spi-nor/spi-nor.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c index 6429c855547e..48bcb2ee1be5 100644 --- a/drivers/mtd/spi-nor/spi-nor.c +++ b/drivers/mtd/spi-nor/spi-nor.c @@ -1493,7 +1493,7 @@ static int spi_nor_erase(struct mtd_info *mtd, struct= erase_info *instr) } =20 /* Write status register and ensure bits in mask match written values */ -static int write_sr_and_check(struct spi_nor *nor, u8 status_new, u8 mask) +static int write_sr_and_check(struct spi_nor *nor, u8 status_new) { int ret; =20 @@ -1507,7 +1507,7 @@ static int write_sr_and_check(struct spi_nor *nor, u8= status_new, u8 mask) if (ret) return ret; =20 - return ((nor->bouncebuf[0] & mask) !=3D (status_new & mask)) ? -EIO : 0; + return (nor->bouncebuf[0] !=3D status_new) ? -EIO : 0; } =20 static void stm_get_locked_range(struct spi_nor *nor, u8 sr, loff_t *ofs, @@ -1673,7 +1673,7 @@ static int stm_lock(struct spi_nor *nor, loff_t ofs, = uint64_t len) if ((status_new & mask) < (status_old & mask)) return -EINVAL; =20 - return write_sr_and_check(nor, status_new, mask); + return write_sr_and_check(nor, status_new); } =20 /* @@ -1758,7 +1758,7 @@ static int stm_unlock(struct spi_nor *nor, loff_t ofs= , uint64_t len) if ((status_new & mask) > (status_old & mask)) return -EINVAL; =20 - return write_sr_and_check(nor, status_new, mask); + return write_sr_and_check(nor, status_new); } =20 /* --=20 2.9.5