From: Christoph Hellwig <hch@infradead.org>
To: Palmer Dabbelt <palmer@sifive.com>
Cc: linux-riscv@lists.infradead.org, mark.rutland@arm.com,
me@carlosedp.com, linux-kernel@vger.kernel.org, joel@sing.id.au,
marco@decred.org
Subject: Re: [PATCH] RISC-V: Clear load reservations while restoring hart contexts
Date: Fri, 27 Sep 2019 15:24:01 -0700 [thread overview]
Message-ID: <20190927222401.GE4700@infradead.org> (raw)
In-Reply-To: <20190925001556.12827-1-palmer@sifive.com>
On Tue, Sep 24, 2019 at 05:15:56PM -0700, Palmer Dabbelt wrote:
> This is almost entirely a comment. The bug is unlikely to manifest on
> existing hardware because there is a timeout on load reservations, but
> manifests on QEMU because there is no timeout.
Given how many different lines of RISC-V hardware are around how do
you know it doesn't affect any existing hardware?
Except for that the patch looks fine to me:
Reviewed-by: Christoph Hellwig <hch@lst.de>
next prev parent reply other threads:[~2019-09-27 22:24 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-25 0:15 Palmer Dabbelt
2019-09-27 22:24 ` Christoph Hellwig [this message]
2019-10-04 17:35 ` Paul Walmsley
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