From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DB741C4360C for ; Fri, 4 Oct 2019 13:33:23 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B3C0C222BE for ; Fri, 4 Oct 2019 13:33:23 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=rasmusvillemoes.dk header.i=@rasmusvillemoes.dk header.b="PbMZgn+B" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388609AbfJDNdD (ORCPT ); Fri, 4 Oct 2019 09:33:03 -0400 Received: from mail-lf1-f65.google.com ([209.85.167.65]:35920 "EHLO mail-lf1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388558AbfJDNdC (ORCPT ); Fri, 4 Oct 2019 09:33:02 -0400 Received: by mail-lf1-f65.google.com with SMTP id x80so4510925lff.3 for ; Fri, 04 Oct 2019 06:33:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rasmusvillemoes.dk; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=1OQAE57/CgK569gxX6I56M38ksMNygkjEmF6P3qjzis=; b=PbMZgn+B0Hr1ICWKuBiRjOj8UTS2Y+vMUyvS6z4bjDoc+6BlUbcFkmaZ36miTfWRij CAZ+zhVUI7ZF8Bilvydqep8UJoFtdGbRhxshN+PZASkatEMrVKqHEPzoFvxC5+Eu7C8L gkcIP07xJoVkwqZ1+SrYYKVfmpaWoTn1ulcag= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=1OQAE57/CgK569gxX6I56M38ksMNygkjEmF6P3qjzis=; b=BkvKXkF5VeeRCM6Rd5pRERGY+4rDEPY1+TNo4icEzhvETu8b2VVVL8oAP8ZEX+ojWx VzulLFxj9gIA+/nMEmSsKexJ5TIGTX1eNSyPCS9ouSnEREQYIcMA8uE21AMIyGWWDlfq nDW3pE5e1nsUKeyFSyLWGTA7CmtWWLru3CbcGjPDhUTSvIXWOz6d47QHQKoI1bRsdoca NbI+5miAfNC9o53gw76+VBN7M9sLVfSwtPJzQesfPNKDz7EjZ1xf6nst8Ai54r8z1N49 oVQFpzijWXLnMh5im96S362fBpt5NC4i7kI5rXDYl8LLa3xPjJR+nfXFs4igPaWOfWGC 8cGA== X-Gm-Message-State: APjAAAXhh3EEQqpH5LeeS29ImPiKJ98t8Hos9X9gCGFP4pq1SjNRFkXr AHjTLjdw1qgNYYE+dpW6rUe9YA== X-Google-Smtp-Source: APXvYqzE/7G06PEqAijCPxhGp3iO3G3UFBOnYRhZM+k3WGz1SKXbxv6e+QegMQXJuE7Pq/qA8KX19A== X-Received: by 2002:ac2:5326:: with SMTP id f6mr9224821lfh.33.1570195980792; Fri, 04 Oct 2019 06:33:00 -0700 (PDT) Received: from prevas-ravi.prevas.se ([81.216.59.226]) by smtp.gmail.com with ESMTPSA id y26sm1534991ljj.90.2019.10.04.06.32.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Oct 2019 06:33:00 -0700 (PDT) From: Rasmus Villemoes To: Thierry Reding , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team Cc: devicetree@vger.kernel.org, Rob Herring , Rasmus Villemoes , linux-pwm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 2/6] pwm: mxs: remove legacy methods Date: Fri, 4 Oct 2019 15:32:03 +0200 Message-Id: <20191004133207.6663-3-linux@rasmusvillemoes.dk> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191004133207.6663-1-linux@rasmusvillemoes.dk> References: <20191004133207.6663-1-linux@rasmusvillemoes.dk> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Since we now have ->apply, these are no longer relevant. Signed-off-by: Rasmus Villemoes --- drivers/pwm/pwm-mxs.c | 77 ------------------------------------------- 1 file changed, 77 deletions(-) diff --git a/drivers/pwm/pwm-mxs.c b/drivers/pwm/pwm-mxs.c index 10efd3de0bb3..5a6835e18fc6 100644 --- a/drivers/pwm/pwm-mxs.c +++ b/drivers/pwm/pwm-mxs.c @@ -110,85 +110,8 @@ static int mxs_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, return 0; } -static int mxs_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, - int duty_ns, int period_ns) -{ - struct mxs_pwm_chip *mxs = to_mxs_pwm_chip(chip); - int ret, div = 0; - unsigned int period_cycles, duty_cycles; - unsigned long rate; - unsigned long long c; - - rate = clk_get_rate(mxs->clk); - while (1) { - c = rate / cdiv[div]; - c = c * period_ns; - do_div(c, 1000000000); - if (c < PERIOD_PERIOD_MAX) - break; - div++; - if (div >= PERIOD_CDIV_MAX) - return -EINVAL; - } - - period_cycles = c; - c *= duty_ns; - do_div(c, period_ns); - duty_cycles = c; - - /* - * If the PWM channel is disabled, make sure to turn on the clock - * before writing the register. Otherwise, keep it enabled. - */ - if (!pwm_is_enabled(pwm)) { - ret = clk_prepare_enable(mxs->clk); - if (ret) - return ret; - } - - writel(duty_cycles << 16, - mxs->base + PWM_ACTIVE0 + pwm->hwpwm * 0x20); - writel(PERIOD_PERIOD(period_cycles) | PERIOD_ACTIVE_HIGH | - PERIOD_INACTIVE_LOW | PERIOD_CDIV(div), - mxs->base + PWM_PERIOD0 + pwm->hwpwm * 0x20); - - /* - * If the PWM is not enabled, turn the clock off again to save power. - */ - if (!pwm_is_enabled(pwm)) - clk_disable_unprepare(mxs->clk); - - return 0; -} - -static int mxs_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm) -{ - struct mxs_pwm_chip *mxs = to_mxs_pwm_chip(chip); - int ret; - - ret = clk_prepare_enable(mxs->clk); - if (ret) - return ret; - - writel(1 << pwm->hwpwm, mxs->base + PWM_CTRL + SET); - - return 0; -} - -static void mxs_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm) -{ - struct mxs_pwm_chip *mxs = to_mxs_pwm_chip(chip); - - writel(1 << pwm->hwpwm, mxs->base + PWM_CTRL + CLR); - - clk_disable_unprepare(mxs->clk); -} - static const struct pwm_ops mxs_pwm_ops = { .apply = mxs_pwm_apply, - .config = mxs_pwm_config, - .enable = mxs_pwm_enable, - .disable = mxs_pwm_disable, .owner = THIS_MODULE, }; -- 2.20.1