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Wed, 16 Oct 2019 15:18:59 +0000 From: Philippe Schenker To: Greg Kroah-Hartman , "linux-serial@vger.kernel.org" CC: Max Krummenacher , Jiri Slaby , "linux-kernel@vger.kernel.org" , Fugang Duan , Stefan Agner , "linux-imx@nxp.com" , Andrey Smirnov , Philippe Schenker Subject: [PATCH v1 3/3] tty: serial: lpuart: Add RS485 support for 32-bit uart flavour Thread-Topic: [PATCH v1 3/3] tty: serial: lpuart: Add RS485 support for 32-bit uart flavour Thread-Index: AQHVhDUIydsEsSxrwEmSYx3VY636Fw== Date: Wed, 16 Oct 2019 15:18:59 +0000 Message-ID: <20191016151845.15859-3-philippe.schenker@toradex.com> References: <20191016151845.15859-1-philippe.schenker@toradex.com> In-Reply-To: <20191016151845.15859-1-philippe.schenker@toradex.com> Accept-Language: en-GB, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: AM0PR10CA0029.EURPRD10.PROD.OUTLOOK.COM (2603:10a6:208:17c::39) To VI1PR0502MB3965.eurprd05.prod.outlook.com (2603:10a6:803:26::20) authentication-results: spf=none (sender IP is ) smtp.mailfrom=philippe.schenker@toradex.com; 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received-spf: None (protection.outlook.com: toradex.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: JWIb/To7xsWzgHo+EBqt1XdSF/0g/8+Lf2qKySKwc8VAydT3h4XX6WfpmSG1H12iKM65czSx+9PSlLLHvN6ZuJh77EhntXmFiGjn0CpzLkVCiV94Q6jcO35Z2N049JJV++t1KbIGlMqyHk6DWCOt/81t6Yq2ZmrxjI1TBIoIfs/L4gnzBjEgxnNQ/wN8yQ5I/+43jiNbfv2OR+KBtv+v/FijiFhz9X5R0lYPqCPeSe9Ntw3246UpfE7ICJuRmpxSgsTmvFF6Datq5lK12sBp42q5pLj6/1p2LDt9Uf9k6OTaHp4vOcY4Ru73aFy4miDeIJN92oe5hNTrdfYeKqU437axu/pjQ3U0ejNizb+E1xose+nmE/LlIZVD8oQCuJLxHOKyVoJukYBuBPiiNlIKiBc3u4V7rUBM+x+m7Wegb6w= Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: toradex.com X-MS-Exchange-CrossTenant-Network-Message-Id: 576d8b2d-f401-4803-4bd6-08d7524c2b55 X-MS-Exchange-CrossTenant-originalarrivaltime: 16 Oct 2019 15:18:59.6725 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: d9995866-0d9b-4251-8315-093f062abab4 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: IPrz2ElIsboFqW8vK6o5d8UpzQv4o6E4hlv4CSBJFcZx5kVVjveB7Vo1Gd+dqyXSRwTu7uSyp3+QKu43WGDIzW62Z9i6ZbajXGXAj71hUtY= X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR0502MB2989 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This commits adds RS485 support for LPUART hardware that uses 32-bit registers. These are typically found in i.MX8 processors. Signed-off-by: Philippe Schenker --- drivers/tty/serial/fsl_lpuart.c | 65 ++++++++++++++++++++++++++++++++- 1 file changed, 63 insertions(+), 2 deletions(-) diff --git a/drivers/tty/serial/fsl_lpuart.c b/drivers/tty/serial/fsl_lpuar= t.c index 346b4a070ce9..22df5f8f48b6 100644 --- a/drivers/tty/serial/fsl_lpuart.c +++ b/drivers/tty/serial/fsl_lpuart.c @@ -1280,6 +1280,57 @@ static int lpuart_config_rs485(struct uart_port *por= t, return 0; } =20 +static int lpuart32_config_rs485(struct uart_port *port, + struct serial_rs485 *rs485) +{ + struct lpuart_port *sport =3D container_of(port, + struct lpuart_port, port); + + unsigned long modem =3D lpuart32_read(&sport->port, UARTMODIR) + & ~(UARTMODEM_TXRTSPOL | UARTMODEM_TXRTSE); + lpuart32_write(&sport->port, modem, UARTMODIR); + + /* clear unsupported configurations */ + rs485->delay_rts_before_send =3D 0; + rs485->delay_rts_after_send =3D 0; + rs485->flags &=3D ~SER_RS485_RX_DURING_TX; + + if (rs485->flags & SER_RS485_ENABLED) { + /* Enable auto RS-485 RTS mode */ + modem |=3D UARTMODEM_TXRTSE; + + /* + * RTS needs to be logic HIGH either during transer _or_ after + * transfer, other variants are not supported by the hardware. + */ + + if (!(rs485->flags & (SER_RS485_RTS_ON_SEND | + SER_RS485_RTS_AFTER_SEND))) + rs485->flags |=3D SER_RS485_RTS_ON_SEND; + + if (rs485->flags & SER_RS485_RTS_ON_SEND && + rs485->flags & SER_RS485_RTS_AFTER_SEND) + rs485->flags &=3D ~SER_RS485_RTS_AFTER_SEND; + + /* + * The hardware defaults to RTS logic HIGH while transfer. + * Switch polarity in case RTS shall be logic HIGH + * after transfer. + * Note: UART is assumed to be active high. + */ + if (rs485->flags & SER_RS485_RTS_ON_SEND) + modem &=3D ~UARTMODEM_TXRTSPOL; + else if (rs485->flags & SER_RS485_RTS_AFTER_SEND) + modem |=3D UARTMODEM_TXRTSPOL; + } + + /* Store the new configuration */ + sport->port.rs485 =3D *rs485; + + lpuart32_write(&sport->port, modem, UARTMODIR); + return 0; +} + static unsigned int lpuart_get_mctrl(struct uart_port *port) { unsigned int temp =3D 0; @@ -1878,6 +1929,13 @@ lpuart32_set_termios(struct uart_port *port, struct = ktermios *termios, ctrl |=3D UARTCTRL_M; } =20 + /* + * When auto RS-485 RTS mode is enabled, + * hardware flow control need to be disabled. + */ + if (sport->port.rs485.flags & SER_RS485_ENABLED) + termios->c_cflag &=3D ~CRTSCTS; + if (termios->c_cflag & CRTSCTS) { modem |=3D (UARTMODIR_RXRTSE | UARTMODIR_TXCTSE); } else { @@ -2405,7 +2463,10 @@ static int lpuart_probe(struct platform_device *pdev= ) sport->port.ops =3D &lpuart_pops; sport->port.flags =3D UPF_BOOT_AUTOCONF; =20 - sport->port.rs485_config =3D lpuart_config_rs485; + if (lpuart_is_32(sport)) + sport->port.rs485_config =3D lpuart32_config_rs485; + else + sport->port.rs485_config =3D lpuart_config_rs485; =20 sport->ipg_clk =3D devm_clk_get(&pdev->dev, "ipg"); if (IS_ERR(sport->ipg_clk)) { @@ -2459,7 +2520,7 @@ static int lpuart_probe(struct platform_device *pdev) sport->port.rs485.delay_rts_after_send) dev_err(&pdev->dev, "driver doesn't support RTS delays\n"); =20 - lpuart_config_rs485(&sport->port, &sport->port.rs485); + sport->port.rs485_config(&sport->port, &sport->port.rs485); =20 sport->dma_tx_chan =3D dma_request_slave_channel(sport->port.dev, "tx"); if (!sport->dma_tx_chan) --=20 2.23.0