From: Viresh Kumar <viresh.kumar@linaro.org>
To: Dmitry Osipenko <digetx@gmail.com>
Cc: Thierry Reding <thierry.reding@gmail.com>,
Jonathan Hunter <jonathanh@nvidia.com>,
Peter De Schrijver <pdeschrijver@nvidia.com>,
Prashant Gaikwad <pgaikwad@nvidia.com>,
"Rafael J. Wysocki" <rjw@rjwysocki.net>,
Rob Herring <robh+dt@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Peter Geis <pgwipeout@gmail.com>,
Nicolas Chauvet <kwizart@gmail.com>,
Marcel Ziswiler <marcel.ziswiler@toradex.com>,
linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org,
devicetree@vger.kernel.org, linux-clk@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v1 11/17] ARM: dts: tegra20: Add CPU Operating Performance Points
Date: Thu, 17 Oct 2019 07:58:54 +0530 [thread overview]
Message-ID: <20191017022854.c23zgp3th7v4afa4@vireshk-i7> (raw)
In-Reply-To: <ba9d6de0-38dc-a851-cf0a-fb9d06461671@gmail.com>
On 16-10-19, 16:21, Dmitry Osipenko wrote:
> 16.10.2019 08:23, Viresh Kumar пишет:
> > On 16-10-19, 00:16, Dmitry Osipenko wrote:
> >> Operating Point are specified per HW version. The OPP voltages are kept
> >> in a separate DTSI file because some boards may not define CPU regulator
> >> in their device-tree if voltage scaling isn't necessary, like for example
> >> in a case of tegra20-trimslice which is outlet-powered device.
> >>
> >> Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
> >> ---
> >> .../boot/dts/tegra20-cpu-opp-microvolt.dtsi | 201 ++++++++++++
> >> arch/arm/boot/dts/tegra20-cpu-opp.dtsi | 302 ++++++++++++++++++
> >> 2 files changed, 503 insertions(+)
> >> create mode 100644 arch/arm/boot/dts/tegra20-cpu-opp-microvolt.dtsi
> >> create mode 100644 arch/arm/boot/dts/tegra20-cpu-opp.dtsi
> >>
> >> diff --git a/arch/arm/boot/dts/tegra20-cpu-opp-microvolt.dtsi b/arch/arm/boot/dts/tegra20-cpu-opp-microvolt.dtsi
> >> new file mode 100644
> >> index 000000000000..e85ffdbef876
> >> --- /dev/null
> >> +++ b/arch/arm/boot/dts/tegra20-cpu-opp-microvolt.dtsi
> >> @@ -0,0 +1,201 @@
> >> +// SPDX-License-Identifier: GPL-2.0
> >> +
> >> +/ {
> >> + cpu0_opp_table: cpu_opp_table0 {
> >> + opp@216000000_750 {
> >
> > Maybe just drop the _750 (i.e. voltage) from the names as we don't generally
> > follow it :)
>
> The reason for the _750 postfix is that there are multiple OPPs for
> 216MHz and they have different voltages for different versions of
> hardware, thus those are separate OPPs and they can't be squashed into a
> single OPP node.
Ah, okay. I missed that you are using supported-hw bindings.
--
viresh
next prev parent reply other threads:[~2019-10-17 2:29 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-10-15 21:16 [PATCH v1 00/17] NVIDIA Tegra20 CPUFreq driver major update Dmitry Osipenko
2019-10-15 21:16 ` [PATCH v1 01/17] clk: tegra: Add custom CCLK implementation Dmitry Osipenko
2019-10-28 14:57 ` Peter De Schrijver
2019-10-28 23:48 ` Dmitry Osipenko
2019-10-15 21:16 ` [PATCH v1 02/17] clk: tegra: pll: Add pre/post rate-change hooks Dmitry Osipenko
2019-10-15 21:16 ` [PATCH v1 03/17] clk: tegra: cclk: Add helpers for handling PLLX rate changes Dmitry Osipenko
2019-10-15 21:16 ` [PATCH v1 04/17] clk: tegra20: Support custom CCLK implementation Dmitry Osipenko
2019-10-15 21:16 ` [PATCH v1 05/17] clk: tegra30: " Dmitry Osipenko
2019-10-15 21:16 ` [PATCH v1 06/17] dt-bindings: cpufreq: Add binding for NVIDIA Tegra20/30 Dmitry Osipenko
2019-10-16 5:13 ` Viresh Kumar
2019-10-17 2:32 ` Viresh Kumar
2019-10-15 21:16 ` [PATCH v1 07/17] cpufreq: tegra20: Use generic cpufreq-dt driver (Tegra30 supported now) Dmitry Osipenko
2019-10-16 5:18 ` Viresh Kumar
2019-10-16 13:29 ` Dmitry Osipenko
2019-10-16 14:58 ` Peter Geis
2019-10-16 18:19 ` Dmitry Osipenko
2019-10-17 2:32 ` Viresh Kumar
2019-10-17 21:09 ` Dmitry Osipenko
2019-10-17 2:33 ` Viresh Kumar
2019-10-15 21:16 ` [PATCH v1 08/17] ARM: tegra: Remove tegra20-cpufreq platform device creation Dmitry Osipenko
2019-10-15 21:16 ` [PATCH v1 09/17] ARM: dts: tegra20: Add CPU clock Dmitry Osipenko
2019-10-15 21:16 ` [PATCH v1 10/17] ARM: dts: tegra30: " Dmitry Osipenko
2019-10-15 21:16 ` [PATCH v1 11/17] ARM: dts: tegra20: Add CPU Operating Performance Points Dmitry Osipenko
2019-10-16 5:23 ` Viresh Kumar
2019-10-16 13:21 ` Dmitry Osipenko
2019-10-17 2:28 ` Viresh Kumar [this message]
2019-10-17 2:32 ` Viresh Kumar
2019-10-15 21:16 ` [PATCH v1 12/17] ARM: dts: tegra30: " Dmitry Osipenko
2019-10-17 2:33 ` Viresh Kumar
2019-10-15 21:16 ` [PATCH v1 13/17] ARM: dts: tegra20: paz00: Set up voltage regulators for DVFS Dmitry Osipenko
2019-10-15 21:16 ` [PATCH v1 14/17] ARM: dts: tegra20: paz00: Add CPU Operating Performance Points Dmitry Osipenko
2019-10-15 21:16 ` [PATCH v1 15/17] ARM: dts: tegra20: trimslice: " Dmitry Osipenko
2019-10-15 21:16 ` [PATCH v1 16/17] ARM: dts: tegra30: beaver: Set up voltage regulators for DVFS Dmitry Osipenko
2019-10-15 21:16 ` [PATCH v1 17/17] ARM: dts: tegra30: beaver: Add CPU Operating Performance Points Dmitry Osipenko
2019-10-16 5:27 ` [PATCH v1 00/17] NVIDIA Tegra20 CPUFreq driver major update Viresh Kumar
2019-10-16 13:16 ` Dmitry Osipenko
2019-10-16 14:01 ` Thierry Reding
2019-10-16 14:20 ` Dmitry Osipenko
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