Re: [PATCH v2 3/4] mtd: rawnand: fsmc: Change to non-atomic bit operations

[Peter Zijlstra <peterz@infradead.org>]

On Mon, Nov 25, 2019 at 11:43:03AM -0800, Fenghua Yu wrote:
> No need for expensive atomic change_bit() on the local variable err_idx[].
> 
> Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
> ---
>  drivers/mtd/nand/raw/fsmc_nand.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/mtd/nand/raw/fsmc_nand.c b/drivers/mtd/nand/raw/fsmc_nand.c
> index a6964feeec77..916496d4ecf2 100644
> --- a/drivers/mtd/nand/raw/fsmc_nand.c
> +++ b/drivers/mtd/nand/raw/fsmc_nand.c
> @@ -809,8 +809,8 @@ static int fsmc_bch8_correct_data(struct nand_chip *chip, u8 *dat,
>  
>  	i = 0;
>  	while (num_err--) {
> -		change_bit(0, (unsigned long *)&err_idx[i]);
> -		change_bit(1, (unsigned long *)&err_idx[i]);
> +		__change_bit(0, (unsigned long *)&err_idx[i]);
> +		__change_bit(1, (unsigned long *)&err_idx[i]);
>  
>  		if (err_idx[i] < chip->ecc.size * 8) {
>  			change_bit(err_idx[i], (unsigned long *)dat);

I'm thinking this all can be written like:

		err_idx[i] ^= 3;

		if (err_idx[i] < chip->ecc.size * 8) {
			err = err_idx[i];
			dat[err >> 3] ^= BIT(err & 7);
		}

It seems unlikely that the @dat we're correcting has concurrency issues.