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Wed, 5 Feb 2020 02:49:10 -0500 (EST) Date: Wed, 5 Feb 2020 08:49:08 +0100 From: Maxime Ripard To: Florian Fainelli Cc: linux-arm-kernel@lists.infradead.org, Rob Herring , Mark Rutland , Ray Jui , Scott Branden , "maintainer:BROADCOM IPROC ARM ARCHITECTURE" , Nicolas Saenz Julienne , Sugaya Taichi , Andrew Jeffery , Arnd Bergmann , Joel Stanley , Vinod Koul , "james.tai" , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , open list , "moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE" Subject: Re: [PATCH v2 11/12] dt-bindings: arm: Document Broadcom SoCs 'secondary-boot-reg' Message-ID: <20200205074908.kwtqadfcwo2mtefk@gilmour.lan> References: <20200204235552.7466-1-f.fainelli@gmail.com> <20200204235552.7466-12-f.fainelli@gmail.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="wa2xbnbegqf4phpr" Content-Disposition: inline In-Reply-To: <20200204235552.7466-12-f.fainelli@gmail.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --wa2xbnbegqf4phpr Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Tue, Feb 04, 2020 at 03:55:51PM -0800, Florian Fainelli wrote: > diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml > index c23c24ff7575..d7b181a44789 100644 > --- a/Documentation/devicetree/bindings/arm/cpus.yaml > +++ b/Documentation/devicetree/bindings/arm/cpus.yaml > @@ -272,6 +272,39 @@ properties: > While optional, it is the preferred way to get access to > the cpu-core power-domains. > > + secondary-boot-reg: > + $ref: '/schemas/types.yaml#/definitions/uint32' > + description: | > + Required for systems that have an "enable-method" property value of > + "brcm,bcm11351-cpu-method", "brcm,bcm23550" or "brcm,bcm-nsp-smp". > + > + This includes the following SoCs: | > + BCM11130, BCM11140, BCM11351, BCM28145, BCM28155, BCM21664, BCM23550 > + BCM58522, BCM58525, BCM58535, BCM58622, BCM58623, BCM58625, BCM88312 > + > + The secondary-boot-reg property is a u32 value that specifies the > + physical address of the register used to request the ROM holding pen > + code release a secondary CPU. The value written to the register is > + formed by encoding the target CPU id into the low bits of the > + physical start address it should jump to. > + > +if: > + # If the enable-method property contains one of those values > + properties: > + enable-method: > + contains: > + enum: > + - brcm,bcm11351-cpu-method > + - brcm,bcm23550 > + - brcm,bcm-nsp-smp > + # and if enable-method is present Those comments were purely for the explanation, but you can keep them I guess :) Regardless on whether or not you keep them, for the whole series Acked-by: Maxime Ripard Maxime --wa2xbnbegqf4phpr Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCXjpzdAAKCRDj7w1vZxhR xUq2AQDV+M4Nkim7RmuY3y8QYuA2P6xeHBu487XApQ5G8aH+fwEAlmF1WVwn93es CiiM9/4giVvGZGr3rNoZg/tgdu0GZQs= =+UYd -----END PGP SIGNATURE----- --wa2xbnbegqf4phpr--