From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E219CC352A4 for ; Wed, 12 Feb 2020 23:12:05 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B546A21569 for ; Wed, 12 Feb 2020 23:12:05 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="Zi1bgx6Z" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729191AbgBLXMF (ORCPT ); Wed, 12 Feb 2020 18:12:05 -0500 Received: from us-smtp-2.mimecast.com ([207.211.31.81]:52431 "EHLO us-smtp-delivery-1.mimecast.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1728603AbgBLXME (ORCPT ); Wed, 12 Feb 2020 18:12:04 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1581549123; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=jCt2P0A22WqnBmF74nxHEDQpAf5e3drV6li46of8UJE=; b=Zi1bgx6ZeH9mHS/2HMCkWLXWy8VkCi7CIvHFxhi2Nh2d2o9DbfhtauuPT49QYsxfNVGhG2 3h6TkTOc4byfnRNREk9izULKgWJlakVTx8CBc6DB4/3PGqnIaUMKoG5M/7hSXT9QdFnkMF GSQTvX/k0bH76eiKFMe4Zjxjt815o1M= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-185-olSKgepONka81QqzzMDk9g-1; Wed, 12 Feb 2020 18:11:58 -0500 X-MC-Unique: olSKgepONka81QqzzMDk9g-1 Received: from smtp.corp.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 600EC800D50; Wed, 12 Feb 2020 23:11:56 +0000 (UTC) Received: from Ruby.bss.redhat.com (dhcp-10-20-1-196.bss.redhat.com [10.20.1.196]) by smtp.corp.redhat.com (Postfix) with ESMTP id 50FE760BF1; Wed, 12 Feb 2020 23:11:52 +0000 (UTC) From: Lyude Paul To: nouveau@lists.freedesktop.org Cc: stable@vger.kernel.org, Ben Skeggs , David Airlie , Daniel Vetter , Ilia Mirkin , =?UTF-8?q?Christian=20K=C3=B6nig?= , Sam Ravnborg , Maarten Lankhorst , Gerd Hoffmann , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: [PATCH] drm/nouveau/kms/gv100-: Re-set LUT after clearing for modesets Date: Wed, 12 Feb 2020 18:11:49 -0500 Message-Id: <20200212231150.171495-1-lyude@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.12 Content-Transfer-Encoding: quoted-printable Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org While certain modeset operations on gv100+ need us to temporarily disable the LUT, we make the mistake of sometimes neglecting to reprogram the LUT after such modesets. In particular, moving a head from one encoder to another seems to trigger this quite often. GV100+ is very picky about having a LUT in most scenarios, so this causes the display engine to hang with the following error code: disp: chid 1 stat 00005080 reason 5 [INVALID_STATE] mthd 0200 data 00000001 code 0000002d) So, fix this by always re-programming the LUT if we're clearing it in a state where the wndw is still visible, and has a XLUT handle programmed. Signed-off-by: Lyude Paul Fixes: facaed62b4cb ("drm/nouveau/kms/gv100: initial support") Cc: # v4.18+ --- drivers/gpu/drm/nouveau/dispnv50/wndw.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/nouveau/dispnv50/wndw.c b/drivers/gpu/drm/no= uveau/dispnv50/wndw.c index 890315291b01..bb737f9281e6 100644 --- a/drivers/gpu/drm/nouveau/dispnv50/wndw.c +++ b/drivers/gpu/drm/nouveau/dispnv50/wndw.c @@ -458,6 +458,8 @@ nv50_wndw_atomic_check(struct drm_plane *plane, struc= t drm_plane_state *state) asyw->clr.ntfy =3D armw->ntfy.handle !=3D 0; asyw->clr.sema =3D armw->sema.handle !=3D 0; asyw->clr.xlut =3D armw->xlut.handle !=3D 0; + if (asyw->clr.xlut && asyw->visible) + asyw->set.xlut =3D asyw->xlut.handle !=3D 0; asyw->clr.csc =3D armw->csc.valid; if (wndw->func->image_clr) asyw->clr.image =3D armw->image.handle[0] !=3D 0; --=20 2.24.1