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From: Mark Brown <broonie@kernel.org>
To: Konrad Kociolek <konrad@cadence.com>
Cc: linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org
Subject: Re: [PATCH v2 1/2] Add Cadence XSPI driver
Date: Thu, 20 Feb 2020 11:40:49 +0000	[thread overview]
Message-ID: <20200220114048.GA3926@sirena.org.uk> (raw)
In-Reply-To: <20200220082354.GA15619@global.cadence.com>

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On Thu, Feb 20, 2020 at 09:23:56AM +0100, Konrad Kociolek wrote:
> The 02/10/2020 19:16, Mark Brown wrote:

> > >  # Add new SPI master controllers in alphabetical order above this line

> > Please keep Kconfig and Makefile alphabetically sorted as the comment in
> > the context from the diff says.  :/

> What I see is Kconfig is first and Makefile is second file in diff,
> according to:
>  drivers/spi/Kconfig            |  11 +
>  drivers/spi/Makefile           |   1 +
> Is that wrong?

Please keep the *contents* of the files Kconfig and Makefile
alphabetically sorted as the comment in the context from the diff says.

> > > +#ifdef CONFIG_OF
> > > +static const struct of_device_id cdns_xspi_of_match[] = {
> > > +	{
> > > +		.compatible = "cdns,xspi-nor-fpga",
> > > +	},

> > Why -fpga?

> This is because this driver was tested only on FPGA board.
> This driver was not tested for ASIC version as PHY
> initialization algorithm is differ.

So there will need to be a separate compatible for any silicon
integrations?  Will that always be the same for all silicon integrations
or should we have properties for the PHY type?

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      reply	other threads:[~2020-02-20 11:40 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-01-28 12:41 Konrad Kociolek
2020-02-10 19:16 ` Mark Brown
2020-02-20  8:23   ` Konrad Kociolek
2020-02-20 11:40     ` Mark Brown [this message]

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