From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BA0D5C35673 for ; Sun, 23 Feb 2020 14:06:29 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 92B3B20880 for ; Sun, 23 Feb 2020 14:06:29 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="YC7K5mZ5" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726884AbgBWOG0 (ORCPT ); Sun, 23 Feb 2020 09:06:26 -0500 Received: from us-smtp-1.mimecast.com ([205.139.110.61]:54089 "EHLO us-smtp-delivery-1.mimecast.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726208AbgBWOG0 (ORCPT ); Sun, 23 Feb 2020 09:06:26 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1582466784; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=wjEKFGXXbksGfV1gmf/5twtr6Wnt++aluNKN+T1SONI=; b=YC7K5mZ57IZqKBaRsI27Axe4h/6Ev3xM9TCdSsH4pW5BFirdGElpKDZkevSHrSRmnpccqM s2V4OwMx1W3cYDGHks6kN/hhumw27j7eU2xSGEZ1ETwn+c3piJD2wUc8yIHDfw83YTPHBG TYY8L1m1MHaB+T8SvSX0u05Cnn1nsSo= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-46--hjgHwCqOH-wdW7CjDfe_g-1; Sun, 23 Feb 2020 09:06:23 -0500 X-MC-Unique: -hjgHwCqOH-wdW7CjDfe_g-1 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 6C80C107ACC4; Sun, 23 Feb 2020 14:06:18 +0000 (UTC) Received: from x1.localdomain.com (ovpn-116-120.ams2.redhat.com [10.36.116.120]) by smtp.corp.redhat.com (Postfix) with ESMTP id CD4CB91833; Sun, 23 Feb 2020 14:06:14 +0000 (UTC) From: Hans de Goede To: Andy Shevchenko , Thomas Gleixner , Ingo Molnar , Borislav Petkov , "H . Peter Anvin" Cc: Hans de Goede , Vipul Kumar , Vipul Kumar , Daniel Lezcano , Srikanth Krishnakar , Cedric Hombourger , Len Brown , Rahul Tanwar , Tony Luck , Gayatri Kammela , x86@kernel.org, linux-kernel@vger.kernel.org, stable@vger.kernel.org Subject: [PATCH v4 1/3] x86/tsc_msr: Use named struct initializers Date: Sun, 23 Feb 2020 15:06:08 +0100 Message-Id: <20200223140610.59612-1-hdegoede@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 Content-Transfer-Encoding: quoted-printable Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Use named struct initializers for the freq_desc struct-s initialization and change the "u8 msr_plat" to a "bool use_msr_plat" to make its meaning more clear instead of relying on a comment to explain it. Cc: stable@vger.kernel.org Signed-off-by: Hans de Goede --- arch/x86/kernel/tsc_msr.c | 28 ++++++++++++++++++---------- 1 file changed, 18 insertions(+), 10 deletions(-) diff --git a/arch/x86/kernel/tsc_msr.c b/arch/x86/kernel/tsc_msr.c index e0cbe4f2af49..5fa41ac3feb1 100644 --- a/arch/x86/kernel/tsc_msr.c +++ b/arch/x86/kernel/tsc_msr.c @@ -22,10 +22,10 @@ * read in MSR_PLATFORM_ID[12:8], otherwise in MSR_PERF_STAT[44:40]. * Unfortunately some Intel Atom SoCs aren't quite compliant to this, * so we need manually differentiate SoC families. This is what the - * field msr_plat does. + * field use_msr_plat does. */ struct freq_desc { - u8 msr_plat; /* 1: use MSR_PLATFORM_INFO, 0: MSR_IA32_PERF_STATUS */ + bool use_msr_plat; u32 freqs[MAX_NUM_FREQS]; }; =20 @@ -35,31 +35,39 @@ struct freq_desc { * by MSR based on SDM. */ static const struct freq_desc freq_desc_pnw =3D { - 0, { 0, 0, 0, 0, 0, 99840, 0, 83200 } + .use_msr_plat =3D false, + .freqs =3D { 0, 0, 0, 0, 0, 99840, 0, 83200 }, }; =20 static const struct freq_desc freq_desc_clv =3D { - 0, { 0, 133200, 0, 0, 0, 99840, 0, 83200 } + .use_msr_plat =3D false, + .freqs =3D { 0, 133200, 0, 0, 0, 99840, 0, 83200 }, }; =20 static const struct freq_desc freq_desc_byt =3D { - 1, { 83300, 100000, 133300, 116700, 80000, 0, 0, 0 } + .use_msr_plat =3D true, + .freqs =3D { 83300, 100000, 133300, 116700, 80000, 0, 0, 0 }, }; =20 static const struct freq_desc freq_desc_cht =3D { - 1, { 83300, 100000, 133300, 116700, 80000, 93300, 90000, 88900, 87500 } + .use_msr_plat =3D true, + .freqs =3D { 83300, 100000, 133300, 116700, 80000, 93300, 90000, + 88900, 87500 }, }; =20 static const struct freq_desc freq_desc_tng =3D { - 1, { 0, 100000, 133300, 0, 0, 0, 0, 0 } + .use_msr_plat =3D true, + .freqs =3D { 0, 100000, 133300, 0, 0, 0, 0, 0 }, }; =20 static const struct freq_desc freq_desc_ann =3D { - 1, { 83300, 100000, 133300, 100000, 0, 0, 0, 0 } + .use_msr_plat =3D true, + .freqs =3D { 83300, 100000, 133300, 100000, 0, 0, 0, 0 }, }; =20 static const struct freq_desc freq_desc_lgm =3D { - 1, { 78000, 78000, 78000, 78000, 78000, 78000, 78000, 78000 } + .use_msr_plat =3D true, + .freqs =3D { 78000, 78000, 78000, 78000, 78000, 78000, 78000, 78000 }, }; =20 static const struct x86_cpu_id tsc_msr_cpu_ids[] =3D { @@ -91,7 +99,7 @@ unsigned long cpu_khz_from_msr(void) return 0; =20 freq_desc =3D (struct freq_desc *)id->driver_data; - if (freq_desc->msr_plat) { + if (freq_desc->use_msr_plat) { rdmsr(MSR_PLATFORM_INFO, lo, hi); ratio =3D (lo >> 8) & 0xff; } else { --=20 2.25.0