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From: Herbert Xu <herbert@gondor.apana.org.au>
To: Zhou Wang <wangzhou1@hisilicon.com>
Cc: Hongbo Yao <yaohongbo@huawei.com>,
	davem@davemloft.net, linux-kernel@vger.kernel.org,
	linux-crypto@vger.kernel.org, chenzhou10@huawei.com,
	xuzaibo@huawei.com
Subject: Re: [PATCH -next] crypto: hisilicon - qm depends on UACCE
Date: Tue, 25 Feb 2020 21:22:37 +1100	[thread overview]
Message-ID: <20200225102237.GA31328@gondor.apana.org.au> (raw)
In-Reply-To: <5E54DE89.2030703@hisilicon.com>

On Tue, Feb 25, 2020 at 04:44:57PM +0800, Zhou Wang wrote:
>
> > diff --git a/drivers/crypto/hisilicon/Kconfig b/drivers/crypto/hisilicon/Kconfig
> > index 8851161f722f..b35c2ec15bc2 100644
> > --- a/drivers/crypto/hisilicon/Kconfig
> > +++ b/drivers/crypto/hisilicon/Kconfig
> > @@ -40,6 +40,7 @@ config CRYPTO_DEV_HISI_QM
> >  	tristate
> >  	depends on ARM64 || COMPILE_TEST
> >  	depends on PCI && PCI_MSI
> > +	depends on UACCE
> >  	help
> >  	  HiSilicon accelerator engines use a common queue management
> >  	  interface. Specific engine driver may use this module.
> >
> 
> Indeed, this driver does not depend on uacce fully, as if there is no uacce, it still can
> register to kernel crypto.
> 
> Seems that changing uacce config to bool can avoid this problem.

You shouldn't make it a bool.  The standard way to solve this is to
add this:

	depends on UACCE || UACCE=n

Cheers,
-- 
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt

  reply	other threads:[~2020-02-25 10:24 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-02-25  3:03 Hongbo Yao
2020-02-25  8:44 ` Zhou Wang
2020-02-25 10:22   ` Herbert Xu [this message]
2020-02-26  1:42     ` Zhou Wang

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