From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C0936C3F2D1 for ; Tue, 3 Mar 2020 02:02:43 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 9EE512465E for ; Tue, 3 Mar 2020 02:02:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727083AbgCCCCm (ORCPT ); Mon, 2 Mar 2020 21:02:42 -0500 Received: from mga05.intel.com ([192.55.52.43]:54060 "EHLO mga05.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726773AbgCCCCm (ORCPT ); Mon, 2 Mar 2020 21:02:42 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 02 Mar 2020 18:02:41 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,509,1574150400"; d="scan'208";a="440384923" Received: from sjchrist-coffee.jf.intel.com ([10.54.74.202]) by fmsmga006.fm.intel.com with ESMTP; 02 Mar 2020 18:02:40 -0800 From: Sean Christopherson To: Paolo Bonzini Cc: Sean Christopherson , Vitaly Kuznetsov , Wanpeng Li , Jim Mattson , Joerg Roedel , kvm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 0/7] KVM: x86/mmu: nVMX: 5-level paging cleanup and enabling Date: Mon, 2 Mar 2020 18:02:33 -0800 Message-Id: <20200303020240.28494-1-sean.j.christopherson@intel.com> X-Mailer: git-send-email 2.24.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Clean up MMU code related to 5 level paging, expose 5-level EPT to L1, and additional clean up on top (mostly renames of functions/variables that caused me no end of confusion when trying to figure out what was broken at various times). v3: - Dropped fixes for existing 5-level bugs (merged for 5.6). - Use get_guest_pgd() instead of get_guest_cr3_or_eptp(). [Paolo] - Add patches to fix MMU role calculation to play nice with 5-level paging without requiring additional CR4.LA_57 bit. v2: - Increase the nested EPT array sizes to accomodate 5-level paging in the patch that adds support for 5-level nested EPT, not in the bug fix for 5-level shadow paging. Sean Christopherson (7): KVM: x86/mmu: Don't drop level/direct from MMU role calculation KVM: x86/mmu: Drop kvm_mmu_extended_role.cr4_la57 hack KVM: nVMX: Allow L1 to use 5-level page walks for nested EPT KVM: nVMX: Rename nested_ept_get_cr3() to nested_ept_get_eptp() KVM: nVMX: Rename EPTP validity helper and associated variables KVM: x86/mmu: Rename kvm_mmu->get_cr3() to ->get_guest_pgd() KVM: nVMX: Drop unnecessary check on ept caps for execute-only arch/x86/include/asm/kvm_host.h | 3 +- arch/x86/include/asm/vmx.h | 12 +++++++ arch/x86/kvm/mmu/mmu.c | 59 +++++++++++++++++---------------- arch/x86/kvm/mmu/paging_tmpl.h | 4 +-- arch/x86/kvm/svm.c | 2 +- arch/x86/kvm/vmx/nested.c | 52 ++++++++++++++++++----------- arch/x86/kvm/vmx/nested.h | 4 +-- arch/x86/kvm/vmx/vmx.c | 3 +- arch/x86/kvm/x86.c | 2 +- 9 files changed, 82 insertions(+), 59 deletions(-) -- 2.24.1