From: <Sergey.Semin@baikalelectronics.ru>
To: unlisted-recipients:; (no To-header on input)
Cc: Serge Semin <Sergey.Semin@baikalelectronics.ru>,
Serge Semin <fancer.lancer@gmail.com>,
Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>,
Maxim Kaurkin <Maxim.Kaurkin@baikalelectronics.ru>,
Pavel Parkhomenko <Pavel.Parkhomenko@baikalelectronics.ru>,
Ramil Zaripov <Ramil.Zaripov@baikalelectronics.ru>,
Ekaterina Skachko <Ekaterina.Skachko@baikalelectronics.ru>,
Vadim Vlasov <V.Vlasov@baikalelectronics.ru>,
Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
Paul Burton <paulburton@kernel.org>,
Ralf Baechle <ralf@linux-mips.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>, <linux-clk@vger.kernel.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Subject: [PATCH 0/5] clk: Add Baikal-T1 SoC Clock Control Unit support
Date: Fri, 6 Mar 2020 16:00:43 +0300 [thread overview]
Message-ID: <20200306130053.BCBFC803078F@mail.baikalelectronics.ru> (raw)
From: Serge Semin <fancer.lancer@gmail.com>
Clocks Control Unit is the core of Baikal-T1 SoC responsible for the chip
subsystems clocking and resetting. The CCU is connected with an external
fixed rate oscillator, which signal is transformed into clocks of various
frequencies and then propagated to either individual IP-blocks or to groups
of blocks (clock domains). The transformation is done by means of PLLs and
gateable/non-gateable, fixed/variable dividers embedded into the CCU. There
are five PLLs to create a clock for the MIPS P5600 cores, the embedded DDR
controller, SATA, Ethernet and PCIe domains. The last three PLLs CLKOUT are
then passed over CCU dividers to create signals required for the target clock
domains: individual AXI and APB bus clocks, SoC devices reference clocks.
The CCU divider registers may also provide a way to reset the target devices
state.
So this patchset introduces the Baikal-T1 clock and reset drivers of CCU
PLLs, AXI-bus clock dividers and system devices clock dividers.
This patchset is rebased and tested on the mainline Linux kernel 5.6-rc4:
commit 98d54f81e36b ("Linux 5.6-rc4").
Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Signed-off-by: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>
Cc: Maxim Kaurkin <Maxim.Kaurkin@baikalelectronics.ru>
Cc: Pavel Parkhomenko <Pavel.Parkhomenko@baikalelectronics.ru>
Cc: Ramil Zaripov <Ramil.Zaripov@baikalelectronics.ru>
Cc: Ekaterina Skachko <Ekaterina.Skachko@baikalelectronics.ru>
Cc: Vadim Vlasov <V.Vlasov@baikalelectronics.ru>
Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: Paul Burton <paulburton@kernel.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: linux-clk@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Serge Semin (5):
dt-bindings: clk: Add Baikal-T1 CCU PLLs bindings
dt-bindings: clk: Add Baikal-T1 AXI-bus CCU bindings
dt-bindings: clk: Add Baikal-T1 System Devices CCU bindings
clk: Add Baikal-T1 CCU PLLs driver
clk: Add Baikal-T1 CCU dividers driver
.../bindings/clock/be,bt1-ccu-axi.yaml | 151 +++++
.../bindings/clock/be,bt1-ccu-pll.yaml | 139 +++++
.../bindings/clock/be,bt1-ccu-sys.yaml | 169 ++++++
drivers/clk/Kconfig | 1 +
drivers/clk/Makefile | 1 +
drivers/clk/baikal-t1/Kconfig | 46 ++
drivers/clk/baikal-t1/Makefile | 3 +
drivers/clk/baikal-t1/ccu-div.c | 531 ++++++++++++++++++
drivers/clk/baikal-t1/ccu-div.h | 114 ++++
drivers/clk/baikal-t1/ccu-pll.c | 474 ++++++++++++++++
drivers/clk/baikal-t1/ccu-pll.h | 73 +++
drivers/clk/baikal-t1/clk-ccu-div.c | 522 +++++++++++++++++
drivers/clk/baikal-t1/clk-ccu-pll.c | 217 +++++++
drivers/clk/baikal-t1/common.h | 51 ++
include/dt-bindings/clock/bt1-ccu.h | 54 ++
include/dt-bindings/reset/bt1-ccu.h | 27 +
16 files changed, 2573 insertions(+)
create mode 100644 Documentation/devicetree/bindings/clock/be,bt1-ccu-axi.yaml
create mode 100644 Documentation/devicetree/bindings/clock/be,bt1-ccu-pll.yaml
create mode 100644 Documentation/devicetree/bindings/clock/be,bt1-ccu-sys.yaml
create mode 100644 drivers/clk/baikal-t1/Kconfig
create mode 100644 drivers/clk/baikal-t1/Makefile
create mode 100644 drivers/clk/baikal-t1/ccu-div.c
create mode 100644 drivers/clk/baikal-t1/ccu-div.h
create mode 100644 drivers/clk/baikal-t1/ccu-pll.c
create mode 100644 drivers/clk/baikal-t1/ccu-pll.h
create mode 100644 drivers/clk/baikal-t1/clk-ccu-div.c
create mode 100644 drivers/clk/baikal-t1/clk-ccu-pll.c
create mode 100644 drivers/clk/baikal-t1/common.h
create mode 100644 include/dt-bindings/clock/bt1-ccu.h
create mode 100644 include/dt-bindings/reset/bt1-ccu.h
--
2.25.1
next reply other threads:[~2020-03-06 13:01 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-06 13:00 Sergey.Semin [this message]
2020-05-06 22:22 ` [PATCH v2 0/4] " Serge Semin
2020-05-06 22:22 ` [PATCH v2 1/4] dt-bindings: clk: Add Baikal-T1 CCU PLLs binding Serge Semin
2020-05-14 19:13 ` Rob Herring
2020-05-14 19:54 ` Serge Semin
2020-05-19 12:33 ` Serge Semin
2020-05-06 22:22 ` [PATCH v2 2/4] dt-bindings: clk: Add Baikal-T1 CCU Dividers binding Serge Semin
2020-05-06 22:22 ` [PATCH v2 3/4] clk: Add Baikal-T1 CCU PLLs driver Serge Semin
2020-05-06 22:27 ` Randy Dunlap
2020-05-06 22:36 ` Serge Semin
2020-05-07 21:46 ` Serge Semin
2020-05-06 22:23 ` [PATCH v2 4/4] clk: Add Baikal-T1 CCU Dividers driver Serge Semin
[not found] <20200306130048.8868-1-Sergey.Semin@baikalelectronics.ru>
2020-03-10 0:21 ` [PATCH 0/5] clk: Add Baikal-T1 SoC Clock Control Unit support Sergey Semin
2020-03-10 2:03 ` Stephen Boyd
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