From: Andre Przywara <andre.przywara@arm.com>
To: Chen-Yu Tsai <wens@kernel.org>
Cc: Maxime Ripard <mripard@kernel.org>,
devicetree@vger.kernel.org, Chen-Yu Tsai <wens@csie.org>,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 1/3] ARM: dts: sun8i: r40: Move AHCI device node based on address order
Date: Wed, 11 Mar 2020 10:59:37 +0000 [thread overview]
Message-ID: <20200311105937.040cd947@donnerap.cambridge.arm.com> (raw)
In-Reply-To: <20200310174709.24174-2-wens@kernel.org>
On Wed, 11 Mar 2020 01:47:07 +0800
Chen-Yu Tsai <wens@kernel.org> wrote:
> From: Chen-Yu Tsai <wens@csie.org>
>
> When the AHCI device node was added, it was added in the wrong location
> in the device tree file. The device nodes should be sorted by register
> address.
>
> Move the device node to before EHCI1, where it belongs.
>
> Fixes: 41c64d3318aa ("ARM: dts: sun8i: r40: add sata node")
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
> ---
> arch/arm/boot/dts/sun8i-r40.dtsi | 22 +++++++++++-----------
> 1 file changed, 11 insertions(+), 11 deletions(-)
>
> diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi
> index d5442b5b6fd2..b278686d0c22 100644
> --- a/arch/arm/boot/dts/sun8i-r40.dtsi
> +++ b/arch/arm/boot/dts/sun8i-r40.dtsi
> @@ -307,6 +307,17 @@ crypto: crypto@1c15000 {
> resets = <&ccu RST_BUS_CE>;
> };
>
> + ahci: sata@1c18000 {
> + compatible = "allwinner,sun8i-r40-ahci";
> + reg = <0x01c18000 0x1000>;
> + interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&ccu CLK_BUS_SATA>, <&ccu CLK_SATA>;
> + resets = <&ccu RST_BUS_SATA>;
> + reset-names = "ahci";
> + status = "disabled";
> +
Did this empty line serve any particular purpose before? If not, you could remove it on the way.
With that fixed:
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Thanks,
Andre.
> + };
> +
> ehci1: usb@1c19000 {
> compatible = "allwinner,sun8i-r40-ehci", "generic-ehci";
> reg = <0x01c19000 0x100>;
> @@ -733,17 +744,6 @@ spi3: spi@1c0f000 {
> #size-cells = <0>;
> };
>
> - ahci: sata@1c18000 {
> - compatible = "allwinner,sun8i-r40-ahci";
> - reg = <0x01c18000 0x1000>;
> - interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&ccu CLK_BUS_SATA>, <&ccu CLK_SATA>;
> - resets = <&ccu RST_BUS_SATA>;
> - reset-names = "ahci";
> - status = "disabled";
> -
> - };
> -
> gmac: ethernet@1c50000 {
> compatible = "allwinner,sun8i-r40-gmac";
> syscon = <&ccu>;
next prev parent reply other threads:[~2020-03-11 10:59 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-10 17:47 [PATCH 0/3] ARM: dts: sun8i: r40: fix SPI address and reorder nodes Chen-Yu Tsai
2020-03-10 17:47 ` [PATCH 1/3] ARM: dts: sun8i: r40: Move AHCI device node based on address order Chen-Yu Tsai
2020-03-11 10:59 ` Andre Przywara [this message]
2020-03-11 14:46 ` Chen-Yu Tsai
2020-03-10 17:47 ` [PATCH 2/3] ARM: dts: sun8i: r40: Fix register base address for SPI2 and SPI3 Chen-Yu Tsai
2020-03-11 11:22 ` Andre Przywara
2020-03-10 17:47 ` [PATCH 3/3] ARM: dts: sun8i: r40: Move SPI device nodes based on address order Chen-Yu Tsai
2020-03-11 11:22 ` Andre Przywara
2020-03-10 18:10 ` [PATCH 0/3] ARM: dts: sun8i: r40: fix SPI address and reorder nodes Maxime Ripard
2020-03-12 3:26 ` Chen-Yu Tsai
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