From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,MENTIONS_GIT_HOSTING,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3AB1DC1975A for ; Thu, 12 Mar 2020 04:10:39 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 1FD38206F2 for ; Thu, 12 Mar 2020 04:10:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727165AbgCLEKi (ORCPT ); Thu, 12 Mar 2020 00:10:38 -0400 Received: from szxga05-in.huawei.com ([45.249.212.191]:11666 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1725980AbgCLEKh (ORCPT ); Thu, 12 Mar 2020 00:10:37 -0400 Received: from DGGEMS411-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id 86278FECFFDF72F6F915; Thu, 12 Mar 2020 12:10:31 +0800 (CST) Received: from DESKTOP-KKJBAGG.china.huawei.com (10.173.220.25) by DGGEMS411-HUB.china.huawei.com (10.3.19.211) with Microsoft SMTP Server id 14.3.487.0; Thu, 12 Mar 2020 12:10:25 +0800 From: Zhenyu Ye To: , , , , , , , CC: , , , , , , , , Subject: [RFC PATCH v2 0/3] arm64: tlb: add support for TTL field Date: Thu, 12 Mar 2020 12:10:15 +0800 Message-ID: <20200312041018.1927-1-yezhenyu2@huawei.com> X-Mailer: git-send-email 2.22.0.windows.1 MIME-Version: 1.0 Content-Transfer-Encoding: 7BIT Content-Type: text/plain; charset=US-ASCII X-Originating-IP: [10.173.220.25] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org ARMv8.4-TTL provides the TTL field in tlbi instruction to indicate the level of translation table walk holding the leaf entry for the address that is being invalidated. Hardware can use this information to determine if there was a risk of splintering. The PATCH v2 is based on Marc's NV series[1]. [1] git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git kvm-arm64/nv-5.6-rc1 Zhenyu Ye (3): arm64: tlb: use __tlbi_level replace __tlbi in Stage-1 arm64: tlb: use mm_struct.context.flags to indicate TTL value arm64: tlb: add support for TTL in some functions arch/arm64/include/asm/mmu.h | 11 +++++++++++ arch/arm64/include/asm/tlb.h | 3 +++ arch/arm64/include/asm/tlbflush.h | 19 ++++++------------- arch/arm64/kernel/process.c | 2 +- arch/arm64/mm/hugetlbpage.c | 2 ++ 5 files changed, 23 insertions(+), 14 deletions(-) -- 2.19.1