mirror of https://lore.kernel.org/lkml/
 help / color / mirror / Atom feed
From: Thomas Gleixner <tglx@linutronix.de>
To: LKML <linux-kernel@vger.kernel.org>
Cc: x86@kernel.org, Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Mark Gross <mgross@linux.intel.com>,
	Tony Luck <tony.luck@intel.com>,
	Jacob Pan <jacob.jun.pan@linux.intel.com>,
	Len Brown <lenb@kernel.org>,
	linux-pm@vger.kernel.org, Paolo Bonzini <pbonzini@redhat.com>,
	Darren Hart <dvhart@infradead.org>,
	Andy Shevchenko <andy@infradead.org>,
	"Rafael J. Wysocki" <rjw@rjwysocki.net>,
	linux-acpi@vger.kernel.org,
	Viresh Kumar <viresh.kumar@linaro.org>,
	Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>,
	linux-edac@vger.kernel.org, platform-driver-x86@vger.kernel.org,
	Jean Delvare <jdelvare@suse.com>,
	Guenter Roeck <linux@roeck-us.net>,
	linux-hwmon@vger.kernel.org, Zhang Rui <rui.zhang@intel.com>,
	Daniel Lezcano <daniel.lezcano@linaro.org>,
	Amit Kucheria <amit.kucheria@verdurent.com>,
	Chanwoo Choi <cw00.choi@samsung.com>,
	Adrian Hunter <adrian.hunter@intel.com>,
	Ulf Hansson <ulf.hansson@linaro.org>,
	linux-mmc@vger.kernel.org, Bjorn Helgaas <bhelgaas@google.com>,
	linux-pci@vger.kernel.org, Takashi Iwai <tiwai@suse.com>,
	alsa-devel@alsa-project.org,
	Herbert Xu <herbert@gondor.apana.org.au>,
	"David S. Miller" <davem@davemloft.net>,
	linux-crypto@vger.kernel.org
Subject: [patch 15/22] intel_idle: Convert to new X86 CPU match macros
Date: Fri, 20 Mar 2020 14:14:00 +0100	[thread overview]
Message-ID: <20200320131510.193755545@linutronix.de> (raw)
In-Reply-To: <20200320131345.635023594@linutronix.de>

The new macro set has a consistent namespace and uses C99 initializers
instead of the grufty C89 ones.

Get rid the of the local macro wrappers for consistency.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Jacob Pan <jacob.jun.pan@linux.intel.com>
Cc: Len Brown <lenb@kernel.org>
Cc: linux-pm@vger.kernel.org
---
 drivers/idle/intel_idle.c |   79 ++++++++++++++++++++++------------------------
 1 file changed, 38 insertions(+), 41 deletions(-)

--- a/drivers/idle/intel_idle.c
+++ b/drivers/idle/intel_idle.c
@@ -1068,51 +1068,48 @@ static const struct idle_cpu idle_cpu_dn
 };
 
 static const struct x86_cpu_id intel_idle_ids[] __initconst = {
-	INTEL_CPU_FAM6(NEHALEM_EP,		idle_cpu_nhx),
-	INTEL_CPU_FAM6(NEHALEM,			idle_cpu_nehalem),
-	INTEL_CPU_FAM6(NEHALEM_G,		idle_cpu_nehalem),
-	INTEL_CPU_FAM6(WESTMERE,		idle_cpu_nehalem),
-	INTEL_CPU_FAM6(WESTMERE_EP,		idle_cpu_nhx),
-	INTEL_CPU_FAM6(NEHALEM_EX,		idle_cpu_nhx),
-	INTEL_CPU_FAM6(ATOM_BONNELL,		idle_cpu_atom),
-	INTEL_CPU_FAM6(ATOM_BONNELL_MID,	idle_cpu_lincroft),
-	INTEL_CPU_FAM6(WESTMERE_EX,		idle_cpu_nhx),
-	INTEL_CPU_FAM6(SANDYBRIDGE,		idle_cpu_snb),
-	INTEL_CPU_FAM6(SANDYBRIDGE_X,		idle_cpu_snx),
-	INTEL_CPU_FAM6(ATOM_SALTWELL,		idle_cpu_atom),
-	INTEL_CPU_FAM6(ATOM_SILVERMONT,		idle_cpu_byt),
-	INTEL_CPU_FAM6(ATOM_SILVERMONT_MID,	idle_cpu_tangier),
-	INTEL_CPU_FAM6(ATOM_AIRMONT,		idle_cpu_cht),
-	INTEL_CPU_FAM6(IVYBRIDGE,		idle_cpu_ivb),
-	INTEL_CPU_FAM6(IVYBRIDGE_X,		idle_cpu_ivt),
-	INTEL_CPU_FAM6(HASWELL,			idle_cpu_hsw),
-	INTEL_CPU_FAM6(HASWELL_X,		idle_cpu_hsx),
-	INTEL_CPU_FAM6(HASWELL_L,		idle_cpu_hsw),
-	INTEL_CPU_FAM6(HASWELL_G,		idle_cpu_hsw),
-	INTEL_CPU_FAM6(ATOM_SILVERMONT_D,	idle_cpu_avn),
-	INTEL_CPU_FAM6(BROADWELL,		idle_cpu_bdw),
-	INTEL_CPU_FAM6(BROADWELL_G,		idle_cpu_bdw),
-	INTEL_CPU_FAM6(BROADWELL_X,		idle_cpu_bdx),
-	INTEL_CPU_FAM6(BROADWELL_D,		idle_cpu_bdx),
-	INTEL_CPU_FAM6(SKYLAKE_L,		idle_cpu_skl),
-	INTEL_CPU_FAM6(SKYLAKE,			idle_cpu_skl),
-	INTEL_CPU_FAM6(KABYLAKE_L,		idle_cpu_skl),
-	INTEL_CPU_FAM6(KABYLAKE,		idle_cpu_skl),
-	INTEL_CPU_FAM6(SKYLAKE_X,		idle_cpu_skx),
-	INTEL_CPU_FAM6(XEON_PHI_KNL,		idle_cpu_knl),
-	INTEL_CPU_FAM6(XEON_PHI_KNM,		idle_cpu_knl),
-	INTEL_CPU_FAM6(ATOM_GOLDMONT,		idle_cpu_bxt),
-	INTEL_CPU_FAM6(ATOM_GOLDMONT_PLUS,	idle_cpu_bxt),
-	INTEL_CPU_FAM6(ATOM_GOLDMONT_D,		idle_cpu_dnv),
-	INTEL_CPU_FAM6(ATOM_TREMONT_D,		idle_cpu_dnv),
+	X86_MATCH_INTEL_FAM6_MODEL(NEHALEM_EP,		&idle_cpu_nhx),
+	X86_MATCH_INTEL_FAM6_MODEL(NEHALEM,		&idle_cpu_nehalem),
+	X86_MATCH_INTEL_FAM6_MODEL(NEHALEM_G,		&idle_cpu_nehalem),
+	X86_MATCH_INTEL_FAM6_MODEL(WESTMERE,		&idle_cpu_nehalem),
+	X86_MATCH_INTEL_FAM6_MODEL(WESTMERE_EP,		&idle_cpu_nhx),
+	X86_MATCH_INTEL_FAM6_MODEL(NEHALEM_EX,		&idle_cpu_nhx),
+	X86_MATCH_INTEL_FAM6_MODEL(ATOM_BONNELL,	&idle_cpu_atom),
+	X86_MATCH_INTEL_FAM6_MODEL(ATOM_BONNELL_MID,	&idle_cpu_lincroft),
+	X86_MATCH_INTEL_FAM6_MODEL(WESTMERE_EX,		&idle_cpu_nhx),
+	X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE,		&idle_cpu_snb),
+	X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE_X,	&idle_cpu_snx),
+	X86_MATCH_INTEL_FAM6_MODEL(ATOM_SALTWELL,	&idle_cpu_atom),
+	X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT,	&idle_cpu_byt),
+	X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT_MID,	&idle_cpu_tangier),
+	X86_MATCH_INTEL_FAM6_MODEL(ATOM_AIRMONT,	&idle_cpu_cht),
+	X86_MATCH_INTEL_FAM6_MODEL(IVYBRIDGE,		&idle_cpu_ivb),
+	X86_MATCH_INTEL_FAM6_MODEL(IVYBRIDGE_X,		&idle_cpu_ivt),
+	X86_MATCH_INTEL_FAM6_MODEL(HASWELL,		&idle_cpu_hsw),
+	X86_MATCH_INTEL_FAM6_MODEL(HASWELL_X,		&idle_cpu_hsx),
+	X86_MATCH_INTEL_FAM6_MODEL(HASWELL_L,		&idle_cpu_hsw),
+	X86_MATCH_INTEL_FAM6_MODEL(HASWELL_G,		&idle_cpu_hsw),
+	X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT_D,	&idle_cpu_avn),
+	X86_MATCH_INTEL_FAM6_MODEL(BROADWELL,		&idle_cpu_bdw),
+	X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_G,		&idle_cpu_bdw),
+	X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_X,		&idle_cpu_bdx),
+	X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_D,		&idle_cpu_bdx),
+	X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_L,		&idle_cpu_skl),
+	X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE,		&idle_cpu_skl),
+	X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE_L,		&idle_cpu_skl),
+	X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE,		&idle_cpu_skl),
+	X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_X,		&idle_cpu_skx),
+	X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNL,	&idle_cpu_knl),
+	X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNM,	&idle_cpu_knl),
+	X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT,	&idle_cpu_bxt),
+	X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_PLUS,	&idle_cpu_bxt),
+	X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_D,	&idle_cpu_dnv),
+	X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_D,	&idle_cpu_dnv),
 	{}
 };
 
-#define INTEL_CPU_FAM6_MWAIT \
-	{ X86_VENDOR_INTEL, 6, X86_MODEL_ANY, X86_FEATURE_MWAIT, 0 }
-
 static const struct x86_cpu_id intel_mwait_ids[] __initconst = {
-	INTEL_CPU_FAM6_MWAIT,
+	X86_MATCH_VENDOR_FAM_FEATURE(INTEL, 6, X86_FEATURE_MWAIT, NULL),
 	{}
 };
 


  parent reply	other threads:[~2020-03-20 13:17 UTC|newest]

Thread overview: 74+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-20 13:13 [patch 00/22] x86/treewide: Consolidate CPU match macro maze and get rid of C89 (sic!) initializers Thomas Gleixner
2020-03-20 13:13 ` [patch 01/22] x86/devicetable: Move x86 specific macro out of generic code Thomas Gleixner
2020-03-20 14:33   ` Andy Shevchenko
2020-03-20 20:24     ` Thomas Gleixner
2020-03-24 22:32   ` [tip: x86/cpu] " tip-bot2 for Thomas Gleixner
2020-03-20 13:13 ` [patch 02/22] x86/cpu: Add conistent CPU match macros Thomas Gleixner
2020-03-20 14:29   ` Bjorn Helgaas
2020-03-20 14:39   ` Andy Shevchenko
2020-03-20 20:27     ` Thomas Gleixner
2020-03-24 22:32   ` [tip: x86/cpu] x86/cpu: Add consistent " tip-bot2 for Thomas Gleixner
2020-03-20 13:13 ` [patch 03/22] x86/cpu/bugs: Convert to new matching macros Thomas Gleixner
2020-03-24 22:32   ` [tip: x86/cpu] " tip-bot2 for Thomas Gleixner
2020-03-20 13:13 ` [patch 04/22] x86/perf/events: Convert to new CPU match macros Thomas Gleixner
2020-03-24 22:32   ` [tip: x86/cpu] " tip-bot2 for Thomas Gleixner
2020-03-20 13:13 ` [patch 05/22] x86/kvm: " Thomas Gleixner
2020-03-24 22:32   ` [tip: x86/cpu] " tip-bot2 for Thomas Gleixner
2020-03-20 13:13 ` [patch 06/22] x86/kernel: " Thomas Gleixner
2020-03-24 22:32   ` [tip: x86/cpu] " tip-bot2 for Thomas Gleixner
2020-03-20 13:13 ` [patch 07/22] x86/platform: " Thomas Gleixner
2020-03-24 22:32   ` [tip: x86/cpu] " tip-bot2 for Thomas Gleixner
2020-03-20 13:13 ` [patch 08/22] ACPI: Convert to new X86 " Thomas Gleixner
2020-03-20 14:47   ` Andy Shevchenko
2020-03-20 20:32     ` Thomas Gleixner
2020-03-23 16:38       ` mark gross
2020-03-24 22:32   ` [tip: x86/cpu] " tip-bot2 for Thomas Gleixner
2020-03-20 13:13 ` [patch 09/22] cpufreq: " Thomas Gleixner
2020-03-20 14:50   ` Andy Shevchenko
2020-03-20 20:30     ` Thomas Gleixner
2020-03-20 21:52       ` Andy Shevchenko
2020-03-20 22:18         ` Thomas Gleixner
     [not found]   ` <20200324060124.GC11705@shao2-debian>
2020-03-24 10:24     ` [cpufreq] 06c4d00466: will-it-scale.per_process_ops -53.4% regression Andy Shevchenko
2020-03-24 15:38       ` Srinivas Pandruvada
2020-03-25  7:51         ` Rong Chen
2020-03-25  7:50       ` Rong Chen
2020-03-25 10:32         ` Thomas Gleixner
2020-03-26  8:33           ` kernel test robot
2020-03-25 12:41     ` [tip: x86/cpu] cpufreq/intel_pstate: Fix wrong macro conversion tip-bot2 for Thomas Gleixner
2020-03-24 13:51   ` [patch V2 09/22] cpufreq: Convert to new X86 CPU match macros Thomas Gleixner
2020-03-24 15:37     ` Rafael J. Wysocki
2020-03-24 22:32     ` [tip: x86/cpu] " tip-bot2 for Thomas Gleixner
2020-03-20 13:13 ` [patch 10/22] EDAC: " Thomas Gleixner
2020-03-24 19:31   ` Luck, Tony
2020-03-24 22:32   ` [tip: x86/cpu] " tip-bot2 for Thomas Gleixner
2020-03-20 13:13 ` [patch 11/22] platform/x86: Convert to new " Thomas Gleixner
2020-03-20 14:52   ` Andy Shevchenko
2020-03-24 22:32   ` [tip: x86/cpu] " tip-bot2 for Thomas Gleixner
2020-03-20 13:13 ` [patch 12/22] hwmon: Convert to new X86 " Thomas Gleixner
2020-03-24 22:32   ` [tip: x86/cpu] " tip-bot2 for Thomas Gleixner
2020-03-20 13:13 ` [patch 13/22] thermal: " Thomas Gleixner
2020-03-24 22:32   ` [tip: x86/cpu] " tip-bot2 for Thomas Gleixner
2020-03-20 13:13 ` [patch 14/22] extcon: axp288: " Thomas Gleixner
2020-03-24 22:32   ` [tip: x86/cpu] " tip-bot2 for Thomas Gleixner
2020-03-20 13:14 ` Thomas Gleixner [this message]
2020-03-24 22:32   ` [tip: x86/cpu] intel_idle: " tip-bot2 for Thomas Gleixner
2020-03-20 13:14 ` [patch 16/22] mmc: sdhci-acpi: " Thomas Gleixner
2020-03-24 22:32   ` [tip: x86/cpu] " tip-bot2 for Thomas Gleixner
2020-03-20 13:14 ` [patch 17/22] PCI: intel-mid: " Thomas Gleixner
2020-03-20 14:30   ` Bjorn Helgaas
2020-03-24 22:32   ` [tip: x86/cpu] " tip-bot2 for Thomas Gleixner
2020-03-20 13:14 ` [patch 18/22] powercap/intel_rapl: " Thomas Gleixner
2020-03-24 22:32   ` [tip: x86/cpu] " tip-bot2 for Thomas Gleixner
2020-03-20 13:14 ` [patch 19/22] ASoC: Intel: " Thomas Gleixner
2020-03-20 14:58   ` Andy Shevchenko
2020-03-24 22:32   ` [tip: x86/cpu] " tip-bot2 for Thomas Gleixner
2020-03-20 13:14 ` [patch 20/22] crypto: Convert to new " Thomas Gleixner
2020-03-24 22:32   ` [tip: x86/cpu] " tip-bot2 for Thomas Gleixner
2020-03-20 13:14 ` [patch 21/22] hwrng: via_rng - Convert to new X86 " Thomas Gleixner
2020-03-24 22:32   ` [tip: x86/cpu] hwrng: via_rng: " tip-bot2 for Thomas Gleixner
2020-03-20 13:14 ` [patch 22/22] x86/cpu: Cleanup the now unused " Thomas Gleixner
2020-03-24 22:32   ` [tip: x86/cpu] " tip-bot2 for Thomas Gleixner
2020-03-20 14:31 ` [patch 00/22] x86/treewide: Consolidate CPU match macro maze and get rid of C89 (sic!) initializers Andy Shevchenko
2020-03-20 14:59 ` Greg Kroah-Hartman
2020-03-24 18:58 ` [PATCH 23/22] x86/smpboot: Remove the last ICPU() macro Borislav Petkov
2020-04-13  8:40   ` [tip: x86/cleanups] " tip-bot2 for Borislav Petkov

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20200320131510.193755545@linutronix.de \
    --to=tglx@linutronix.de \
    --cc=adrian.hunter@intel.com \
    --cc=alsa-devel@alsa-project.org \
    --cc=amit.kucheria@verdurent.com \
    --cc=andy@infradead.org \
    --cc=bhelgaas@google.com \
    --cc=cw00.choi@samsung.com \
    --cc=daniel.lezcano@linaro.org \
    --cc=davem@davemloft.net \
    --cc=dvhart@infradead.org \
    --cc=gregkh@linuxfoundation.org \
    --cc=herbert@gondor.apana.org.au \
    --cc=jacob.jun.pan@linux.intel.com \
    --cc=jdelvare@suse.com \
    --cc=lenb@kernel.org \
    --cc=linux-acpi@vger.kernel.org \
    --cc=linux-crypto@vger.kernel.org \
    --cc=linux-edac@vger.kernel.org \
    --cc=linux-hwmon@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-mmc@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=linux-pm@vger.kernel.org \
    --cc=linux@roeck-us.net \
    --cc=mgross@linux.intel.com \
    --cc=pbonzini@redhat.com \
    --cc=platform-driver-x86@vger.kernel.org \
    --cc=rjw@rjwysocki.net \
    --cc=rui.zhang@intel.com \
    --cc=srinivas.pandruvada@linux.intel.com \
    --cc=tiwai@suse.com \
    --cc=tony.luck@intel.com \
    --cc=ulf.hansson@linaro.org \
    --cc=viresh.kumar@linaro.org \
    --cc=x86@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox

Powered by JetHome