From: David Miller <davem@davemloft.net>
To: o.rempel@pengutronix.de
Cc: andrew@lunn.ch, f.fainelli@gmail.com, hkallweit1@gmail.com,
mark.rutland@arm.com, robh+dt@kernel.org, s.hauer@pengutronix.de,
shawnguo@kernel.org, linux@armlinux.org.uk, david@protonic.nl,
devicetree@vger.kernel.org, festevam@gmail.com,
kernel@pengutronix.de, lgirdwood@gmail.com,
linux-arm-kernel@lists.infradead.org, linux-imx@nxp.com,
linux-kernel@vger.kernel.org, broonie@kernel.org,
netdev@vger.kernel.org, philippe.schenker@toradex.com
Subject: Re: [PATCH] net: phy: at803x: fix clock sink configuration on ATH8030 and ATH8035
Date: Wed, 01 Apr 2020 11:21:36 -0700 (PDT) [thread overview]
Message-ID: <20200401.112136.685481342101422062.davem@davemloft.net> (raw)
In-Reply-To: <20200401095732.23197-1-o.rempel@pengutronix.de>
From: Oleksij Rempel <o.rempel@pengutronix.de>
Date: Wed, 1 Apr 2020 11:57:32 +0200
> The masks in priv->clk_25m_reg and priv->clk_25m_mask are one-bits-set
> for the values that comprise the fields, not zero-bits-set.
>
> This patch fixes the clock frequency configuration for ATH8030 and
> ATH8035 Atheros PHYs by removing the erroneous "~".
>
> To reproduce this bug, configure the PHY with the device tree binding
> "qca,clk-out-frequency" and remove the machine specific PHY fixups.
>
> Fixes: 2f664823a47021 ("net: phy: at803x: add device tree binding")
> Reported-by: Russell King <linux@armlinux.org.uk>
> Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Applied with Reported-by: fixed and queued up for -stable, thanks.
prev parent reply other threads:[~2020-04-01 18:21 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-01 9:57 Oleksij Rempel
2020-04-01 17:17 ` Russell King - ARM Linux admin
2020-04-01 18:21 ` David Miller [this message]
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