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From: Christoph Hellwig <hch@lst.de>
To: x86@kernel.org, Dave Hansen <dave.hansen@linux.intel.com>,
	Andy Lutomirski <luto@kernel.org>,
	Peter Zijlstra <peterz@infradead.org>,
	linux-kernel@vger.kernel.org
Subject: [PATCH 1/4] x86/mm: Add a x86_has_pat_wp helper
Date: Wed,  8 Apr 2020 17:27:42 +0200	[thread overview]
Message-ID: <20200408152745.1565832-2-hch@lst.de> (raw)
In-Reply-To: <20200408152745.1565832-1-hch@lst.de>

Abstract the ioremap code away from the caching mode internals.

Signed-off-by: Christoph Hellwig <hch@lst.de>
---
 arch/x86/include/asm/memtype.h | 2 ++
 arch/x86/mm/init.c             | 6 ++++++
 arch/x86/mm/ioremap.c          | 8 ++------
 3 files changed, 10 insertions(+), 6 deletions(-)

diff --git a/arch/x86/include/asm/memtype.h b/arch/x86/include/asm/memtype.h
index 9c2447b3555d..1e4e99b40711 100644
--- a/arch/x86/include/asm/memtype.h
+++ b/arch/x86/include/asm/memtype.h
@@ -24,4 +24,6 @@ extern void memtype_free_io(resource_size_t start, resource_size_t end);
 
 extern bool pat_pfn_immune_to_uc_mtrr(unsigned long pfn);
 
+bool x86_has_pat_wp(void);
+
 #endif /* _ASM_X86_MEMTYPE_H */
diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c
index e7bb483557c9..83e5780768ad 100644
--- a/arch/x86/mm/init.c
+++ b/arch/x86/mm/init.c
@@ -71,6 +71,12 @@ uint8_t __pte2cachemode_tbl[8] = {
 };
 EXPORT_SYMBOL(__pte2cachemode_tbl);
 
+/* Check that the write-protect PAT entry is set for write-protect */
+bool x86_has_pat_wp(void)
+{
+	return __pte2cachemode_tbl[_PAGE_CACHE_MODE_WP] == _PAGE_CACHE_MODE_WP;
+}
+
 static unsigned long __initdata pgt_buf_start;
 static unsigned long __initdata pgt_buf_end;
 static unsigned long __initdata pgt_buf_top;
diff --git a/arch/x86/mm/ioremap.c b/arch/x86/mm/ioremap.c
index 18c637c0dc6f..41536f523a5f 100644
--- a/arch/x86/mm/ioremap.c
+++ b/arch/x86/mm/ioremap.c
@@ -778,10 +778,8 @@ void __init *early_memremap_encrypted(resource_size_t phys_addr,
 void __init *early_memremap_encrypted_wp(resource_size_t phys_addr,
 					 unsigned long size)
 {
-	/* Be sure the write-protect PAT entry is set for write-protect */
-	if (__pte2cachemode_tbl[_PAGE_CACHE_MODE_WP] != _PAGE_CACHE_MODE_WP)
+	if (!x86_has_pat_wp())
 		return NULL;
-
 	return early_memremap_prot(phys_addr, size, __PAGE_KERNEL_ENC_WP);
 }
 
@@ -799,10 +797,8 @@ void __init *early_memremap_decrypted(resource_size_t phys_addr,
 void __init *early_memremap_decrypted_wp(resource_size_t phys_addr,
 					 unsigned long size)
 {
-	/* Be sure the write-protect PAT entry is set for write-protect */
-	if (__pte2cachemode_tbl[_PAGE_CACHE_MODE_WP] != _PAGE_CACHE_MODE_WP)
+	if (!x86_has_pat_wp())
 		return NULL;
-
 	return early_memremap_prot(phys_addr, size, __PAGE_KERNEL_NOENC_WP);
 }
 #endif	/* CONFIG_AMD_MEM_ENCRYPT */
-- 
2.25.1


  reply	other threads:[~2020-04-08 15:27 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-08 15:27 hide __pte2cachemode_tbl and __cachemode2pte_tbl Christoph Hellwig
2020-04-08 15:27 ` Christoph Hellwig [this message]
2020-04-20 13:30   ` [tip: x86/mm] x86/mm: Add a x86_has_pat_wp() helper tip-bot2 for Christoph Hellwig
2020-04-08 15:27 ` [PATCH 2/4] x86/mm: Move pgprot2cachemode out of line Christoph Hellwig
2020-04-20 13:30   ` [tip: x86/mm] " tip-bot2 for Christoph Hellwig
2020-04-08 15:27 ` [PATCH 3/4] x86/mm: Cleanup pgprot_4k_2_large and pgprot_large_2_4k Christoph Hellwig
2020-04-20 13:30   ` [tip: x86/mm] x86/mm: Cleanup pgprot_4k_2_large() and pgprot_large_2_4k() tip-bot2 for Christoph Hellwig
2020-04-23 12:26   ` tip-bot2 for Christoph Hellwig
2020-04-08 15:27 ` [PATCH 4/4] x86/mm: Unexport __cachemode2pte_tbl Christoph Hellwig
2020-04-20 13:30   ` [tip: x86/mm] " tip-bot2 for Christoph Hellwig
2020-04-23 12:26   ` tip-bot2 for Christoph Hellwig
2020-04-20  8:46 ` hide __pte2cachemode_tbl and __cachemode2pte_tbl Christoph Hellwig
2020-04-20 10:30 ` Peter Zijlstra

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