From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.6 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 95EFDC2BA19 for ; Mon, 13 Apr 2020 12:15:48 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 72B892075E for ; Mon, 13 Apr 2020 12:15:48 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=crapouillou.net header.i=@crapouillou.net header.b="UXRNWbgC" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729443AbgDMMPr (ORCPT ); Mon, 13 Apr 2020 08:15:47 -0400 Received: from outils.crapouillou.net ([89.234.176.41]:53022 "EHLO crapouillou.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728351AbgDMMPq (ORCPT ); Mon, 13 Apr 2020 08:15:46 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=crapouillou.net; s=mail; t=1586780129; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=cVBbu8tSD0a/uokh95yriTzXYfGPwFyZfrsThitWENM=; b=UXRNWbgCMWuSCP5liVA/FqMSR5OKxwu8/Q3i4hgd77oHqmOLoxrsqAMQ/2Ea//8aJQyB76 im10upnfNTmKUiNJfOGPV56NP3krBSl54DI5TgJfJLE0c5e2jY15zz5v3CPATTVZrxUZeK ME3Kw+U/dnmhNPKAtKfD9syAawRrxsc= From: Paul Cercueil To: Thierry Reding , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Cc: od@zcrc.me, linux-pwm@vger.kernel.org, linux-kernel@vger.kernel.org, Paul Cercueil Subject: [PATCH 3/3] pwm: jz4740: Add support for the JZ4725B Date: Mon, 13 Apr 2020 14:14:45 +0200 Message-Id: <20200413121445.72996-3-paul@crapouillou.net> In-Reply-To: <20200413121445.72996-1-paul@crapouillou.net> References: <20200413121445.72996-1-paul@crapouillou.net> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The PWM hardware in the JZ4725B works the same as in the JZ4740, but has only six channels available. Signed-off-by: Paul Cercueil --- Notes: I did not add documentation for the new jz4725b-pwm compatible string on purpose. The reason is that the documentation file for the Timer/Counter Unit (TCU) of Ingenic SoCs will be completely rewritten from .txt to YAML in a separate patchset. drivers/pwm/pwm-jz4740.c | 20 +++++++++++++++++--- 1 file changed, 17 insertions(+), 3 deletions(-) diff --git a/drivers/pwm/pwm-jz4740.c b/drivers/pwm/pwm-jz4740.c index f566f9d248d6..bb27934fb6c2 100644 --- a/drivers/pwm/pwm-jz4740.c +++ b/drivers/pwm/pwm-jz4740.c @@ -22,6 +22,10 @@ #define NUM_PWM 8 +struct soc_info { + unsigned int num_pwms; +}; + struct jz4740_pwm_chip { struct pwm_chip chip; struct regmap *map; @@ -36,7 +40,7 @@ static bool jz4740_pwm_can_use_chn(struct jz4740_pwm_chip *jz, unsigned int channel) { /* Enable all TCU channels for PWM use by default except channels 0/1 */ - u32 pwm_channels_mask = GENMASK(NUM_PWM - 1, 2); + u32 pwm_channels_mask = GENMASK(jz->chip.npwm - 1, 2); device_property_read_u32(jz->chip.dev->parent, "ingenic,pwm-channels-mask", @@ -214,6 +218,7 @@ static int jz4740_pwm_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; struct jz4740_pwm_chip *jz4740; + const struct soc_info *info = device_get_match_data(dev); jz4740 = devm_kzalloc(dev, sizeof(*jz4740), GFP_KERNEL); if (!jz4740) @@ -227,8 +232,8 @@ static int jz4740_pwm_probe(struct platform_device *pdev) jz4740->chip.dev = dev; jz4740->chip.ops = &jz4740_pwm_ops; - jz4740->chip.npwm = NUM_PWM; jz4740->chip.base = -1; + jz4740->chip.npwm = info ? info->num_pwms : NUM_PWM; jz4740->chip.of_xlate = of_pwm_xlate_with_flags; jz4740->chip.of_pwm_n_cells = 3; @@ -244,9 +249,18 @@ static int jz4740_pwm_remove(struct platform_device *pdev) return pwmchip_remove(&jz4740->chip); } +static const struct soc_info __maybe_unused jz4740_soc_info = { + .num_pwms = 8, +}; + +static const struct soc_info __maybe_unused jz4725b_soc_info = { + .num_pwms = 6, +}; + #ifdef CONFIG_OF static const struct of_device_id jz4740_pwm_dt_ids[] = { - { .compatible = "ingenic,jz4740-pwm", }, + { .compatible = "ingenic,jz4740-pwm", .data = &jz4740_soc_info }, + { .compatible = "ingenic,jz4725b-pwm", .data = &jz4725b_soc_info }, {}, }; MODULE_DEVICE_TABLE(of, jz4740_pwm_dt_ids); -- 2.25.1