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[95.91.252.200]) by smtp.gmail.com with ESMTPSA id 128sm491210wme.39.2020.05.14.14.23.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 May 2020 14:23:52 -0700 (PDT) From: huobean@gmail.com X-Google-Original-From: beanhuo@micron.com To: miquel.raynal@bootlin.com, richard@nod.at, vigneshr@ti.com, s.hauer@pengutronix.de, boris.brezillon@collabora.com, derosier@gmail.com Cc: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org, Bean Huo Subject: [PATCH v3 3/5] mtd: rawnand: Add write_oob hook in nand_chip_ops Date: Thu, 14 May 2020 23:23:31 +0200 Message-Id: <20200514212333.28692-4-beanhuo@micron.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200514212333.28692-1-beanhuo@micron.com> References: <20200514212333.28692-1-beanhuo@micron.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Bean Huo Break the function nand_write_oob() into two functions, and one of them is named nand_write_oob_nand(), which will be assigned to new added hook write_oob by default. The hook write_oob will be overwritten in the NAND vendor lower-level driver if needed. Signed-off-by: Miquel Raynal Signed-off-by: Bean Huo --- drivers/mtd/nand/raw/internals.h | 3 ++- drivers/mtd/nand/raw/nand_base.c | 9 +++++++++ include/linux/mtd/rawnand.h | 3 +++ 3 files changed, 14 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/nand/raw/internals.h b/drivers/mtd/nand/raw/internals.h index 9d0caadf940e..d54bc43f9ccd 100644 --- a/drivers/mtd/nand/raw/internals.h +++ b/drivers/mtd/nand/raw/internals.h @@ -96,7 +96,8 @@ int nand_read_param_page_op(struct nand_chip *chip, u8 page, void *buf, void nand_decode_ext_id(struct nand_chip *chip); void panic_nand_wait(struct nand_chip *chip, unsigned long timeo); void sanitize_string(uint8_t *s, size_t len); - +int nand_write_oob_nand(struct nand_chip *chip, loff_t to, + struct mtd_oob_ops *ops); static inline bool nand_has_exec_op(struct nand_chip *chip) { if (!chip->controller || !chip->controller->ops || diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c index 842490d9fd09..b630f7f6a651 100644 --- a/drivers/mtd/nand/raw/nand_base.c +++ b/drivers/mtd/nand/raw/nand_base.c @@ -4121,6 +4121,13 @@ static int nand_write_oob(struct mtd_info *mtd, loff_t to, struct mtd_oob_ops *ops) { struct nand_chip *chip = mtd_to_nand(mtd); + + return chip->ops.write_oob(chip, to, ops); +} + +int nand_write_oob_nand(struct nand_chip *chip, loff_t to, + struct mtd_oob_ops *ops) +{ int ret; ops->retlen = 0; @@ -4427,6 +4434,8 @@ static void nand_set_defaults(struct nand_chip *chip) if (!chip->buf_align) chip->buf_align = 1; + + chip->ops.write_oob = nand_write_oob_nand; } /* Sanitize ONFI strings so we can safely print them */ diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h index f60cfe93b226..a1bb2acfaf6a 100644 --- a/include/linux/mtd/rawnand.h +++ b/include/linux/mtd/rawnand.h @@ -1020,6 +1020,7 @@ struct nand_legacy { * setting the read-retry mode. Mostly needed for MLC NAND. * @pre_erase: [FLASHSPECIFIC] prepare a physical erase block * @post_erase: [FLASHSPECIFIC] physical block erase post + * @write_oob: [REPLACEABLE] Raw NAND write operation */ struct nand_chip_ops { int (*suspend)(struct nand_chip *chip); @@ -1029,6 +1030,8 @@ struct nand_chip_ops { int (*setup_read_retry)(struct nand_chip *chip, int retry_mode); int (*pre_erase)(struct nand_chip *chip, u32 eraseblock); int (*post_erase)(struct nand_chip *chip, u32 eraseblock); + int (*write_oob)(struct nand_chip *chip, loff_t to, + struct mtd_oob_ops *ops); }; /** -- 2.17.1