From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.6 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4456BC433DF for ; Tue, 19 May 2020 10:18:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 157E0206D4 for ; Tue, 19 May 2020 10:18:01 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="OTrHYfkH" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728654AbgESKSA (ORCPT ); Tue, 19 May 2020 06:18:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45608 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728626AbgESKRz (ORCPT ); Tue, 19 May 2020 06:17:55 -0400 Received: from mail-wr1-x443.google.com (mail-wr1-x443.google.com [IPv6:2a00:1450:4864:20::443]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8955FC061A0C for ; Tue, 19 May 2020 03:17:54 -0700 (PDT) Received: by mail-wr1-x443.google.com with SMTP id e16so15227741wra.7 for ; Tue, 19 May 2020 03:17:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=A0dzsFd7YATdAmh4B3Ufb/iHlKjHhY14r5pPPWljdn0=; b=OTrHYfkHzzmIKmL1oQTQzaP6hizd0MYkrJcpEaKfFmT6JKEdv6qVTE1lg+LBXOpWW/ B6qyGK1TH2ZsRlpPaUXSdqmZzZ2/ma+OyRUSdJYCCDKIJffmBgqM5yiAZjSJD3Xuhspn X7NJQ6jlDLEriz8QHi5ttb63Zh0Q8EOL9x4CVDyCBBxXZ0A4SrHavP+BIDM06uv8XeEN ey0mHmZRBgOAegD1bJYAH2ly38v3vIdm9DqIIwrI3mhQwN/2/R2GpJ9fagNqgi6JsG9M C30fFLNOiu6l4UaS+vBnYeUeLjK1kIc75BAhITE5LIW+VX+AHrzxlW+2qP4RLSHuE8UF LLow== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=A0dzsFd7YATdAmh4B3Ufb/iHlKjHhY14r5pPPWljdn0=; b=hALqt+5LOWE+j3DmJ7hKUW5YTp9YDMPhMo3TIWNUK/uN8eCFC8TYv4Lfz/YOGGbDdU Wj8h8C8xfT9t2lKx4x/pCeTSrZUwEQ7crZrkIf1n0qCqJdF575JgqGbat4guAl7S/yGl fJdNQW0WC0jTFKHN1wWAbMqkBpf+eT7JPyLIGM5UUTx8lMy8ZA3ezAxUQJuoV6cxIAEp pGi7ECa1u2IrY4zS4mx5pKigVjtuvOanW6udQgYonUW+8TFjXcpgg1CPiNZZ54JI88nE pyVo9H5BhtfvJIY9EqjKTdzjCX74uqqgomMZRO9VzDNe/NFowIX8mRrPqNa/zEd1j/VL DEPA== X-Gm-Message-State: AOAM530k82asKaFdtt4Giz69MWPYGBlzVDhExyCeKsYwTzGX7/d3eNiY WK2uz0mCiQjLrstN+Qou42zBsN/RyZNWHw== X-Google-Smtp-Source: ABdhPJzIO0FRdhKzhVIcXSDXsYNgM+AY6/roJHSk4k92JS+Nf2+35NB/qFXpKWpr+9usDiHz5dL04Q== X-Received: by 2002:adf:a35c:: with SMTP id d28mr23884503wrb.37.1589883473241; Tue, 19 May 2020 03:17:53 -0700 (PDT) Received: from ubuntu-G3.micron.com ([165.225.86.140]) by smtp.gmail.com with ESMTPSA id w15sm3062488wmi.35.2020.05.19.03.17.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 May 2020 03:17:52 -0700 (PDT) From: Bean Huo To: miquel.raynal@bootlin.com, richard@nod.at, vigneshr@ti.com, s.hauer@pengutronix.de, boris.brezillon@collabora.com, derosier@gmail.com Cc: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org, huobean@gmail.com, Bean Huo Subject: [RESET PATCH v5 3/5] mtd: rawnand: Add write_oob hook in nand_chip_ops Date: Tue, 19 May 2020 12:17:32 +0200 Message-Id: <20200519101734.19927-4-huobean@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200519101734.19927-1-huobean@gmail.com> References: <20200519101734.19927-1-huobean@gmail.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Bean Huo Break the function nand_write_oob() into two functions, and one of them is named nand_write_oob_nand(), which will be assigned to new added hook write_oob by default. The hook write_oob will be overwritten in the NAND vendor lower-level driver if needed. Signed-off-by: Miquel Raynal Signed-off-by: Bean Huo --- drivers/mtd/nand/raw/internals.h | 3 ++- drivers/mtd/nand/raw/nand_base.c | 9 +++++++++ include/linux/mtd/rawnand.h | 3 +++ 3 files changed, 14 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/nand/raw/internals.h b/drivers/mtd/nand/raw/internals.h index 03866b0aadea..94d300a207ac 100644 --- a/drivers/mtd/nand/raw/internals.h +++ b/drivers/mtd/nand/raw/internals.h @@ -99,7 +99,8 @@ int nand_read_param_page_op(struct nand_chip *chip, u8 page, void *buf, void nand_decode_ext_id(struct nand_chip *chip); void panic_nand_wait(struct nand_chip *chip, unsigned long timeo); void sanitize_string(uint8_t *s, size_t len); - +int nand_write_oob_nand(struct nand_chip *chip, loff_t to, + struct mtd_oob_ops *ops); static inline bool nand_has_exec_op(struct nand_chip *chip) { if (!chip->controller || !chip->controller->ops || diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c index e90b7ae878e2..09ee490c08a9 100644 --- a/drivers/mtd/nand/raw/nand_base.c +++ b/drivers/mtd/nand/raw/nand_base.c @@ -4267,6 +4267,13 @@ static int nand_write_oob(struct mtd_info *mtd, loff_t to, struct mtd_oob_ops *ops) { struct nand_chip *chip = mtd_to_nand(mtd); + + return chip->ops.write_oob(chip, to, ops); +} + +int nand_write_oob_nand(struct nand_chip *chip, loff_t to, + struct mtd_oob_ops *ops) +{ int ret; ops->retlen = 0; @@ -4573,6 +4580,8 @@ static void nand_set_defaults(struct nand_chip *chip) if (!chip->buf_align) chip->buf_align = 1; + + chip->ops.write_oob = nand_write_oob_nand; } /* Sanitize ONFI strings so we can safely print them */ diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h index df3d4b3ef2f6..3d75e50e5b75 100644 --- a/include/linux/mtd/rawnand.h +++ b/include/linux/mtd/rawnand.h @@ -1035,6 +1035,7 @@ struct nand_legacy { * setting the read-retry mode. Mostly needed for MLC NAND. * @pre_erase: [FLASHSPECIFIC] prepare a physical erase block * @post_erase: [FLASHSPECIFIC] physical block erase post + * @write_oob: [REPLACEABLE] Raw NAND write operation */ struct nand_chip_ops { int (*suspend)(struct nand_chip *chip); @@ -1044,6 +1045,8 @@ struct nand_chip_ops { int (*setup_read_retry)(struct nand_chip *chip, int retry_mode); int (*pre_erase)(struct nand_chip *chip, u32 eraseblock); int (*post_erase)(struct nand_chip *chip, u32 eraseblock); + int (*write_oob)(struct nand_chip *chip, loff_t to, + struct mtd_oob_ops *ops); }; /** -- 2.17.1