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From: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
To: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Cc: Serge Semin <fancer.lancer@gmail.com>,
	Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>,
	Paul Burton <paulburton@kernel.org>,
	Ralf Baechle <ralf@linux-mips.org>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Arnd Bergmann <arnd@arndb.de>, Rob Herring <robh+dt@kernel.org>,
	linux-pm@vger.kernel.org, devicetree@vger.kernel.org,
	Vincenzo Frascino <vincenzo.frascino@arm.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 18/20] mips: csrc-r4k: Decrease r4k-clocksource rating if CPU_FREQ enabled
Date: Tue, 19 May 2020 17:50:53 +0200	[thread overview]
Message-ID: <20200519155053.GB15797@alpha.franken.de> (raw)
In-Reply-To: <20200518205752.txbylbjt2zkwdwwe@mobilestation>

On Mon, May 18, 2020 at 11:57:52PM +0300, Serge Semin wrote:
> On Mon, May 18, 2020 at 06:32:06PM +0200, Thomas Bogendoerfer wrote:
> > On Mon, May 18, 2020 at 04:48:20PM +0300, Serge Semin wrote:
> > > On Fri, May 15, 2020 at 11:06:47PM +0200, Thomas Bogendoerfer wrote:
> > > > On Fri, May 15, 2020 at 10:48:27AM +0300, Serge Semin wrote:
> > > > > Thomas,
> > > > > Could you take a look at my comment below so I could proceed with the
> > > > > patchset v3 development?
> > > > 
> > > > I can't help, but using r4k clocksource with changing frequency is
> > > > probaly only usefull as a random generator. So IMHO the only two
> > > > options are disabling it or implement what arch/x86/kernel/tsc.c does.
> > > > 
> > > > Thomas.
> > > 
> > > Thomas, could you proceed with the rest of the patches review?
> > > ├─>[PATCH v2 16/20] bus: cdmm: Add MIPS R5 arch support
> > > ├─>[PATCH v2 15/20] mips: cdmm: Add mti,mips-cdmm dtb node support
> > 
> > both are not my call, but look ok to me.
> 
> Can I add your Reviewed-by tag there then?

only for 16/20. 15/20 looks ok to me, but I have not enough insides
on the hardware to say this is good.

> > > ├─>[PATCH v2 13/20] mips: early_printk_8250: Use offset-sized IO-mem accessors
> > 
> > that's broken. A reg shift of 2 doesn't mean we could use 32bit access
> > to the registers on other platforms. As I don't think adding some ifdefery
> > makes things nicer, just implement the your prom_putchar in board code.
> 
> I thought about that initially, but then I decided to alter the generic
> early_printk_8250 code instead. My version of prom_putchar() would be almost
> the same as one implemented in the early_printk_8250 module except minor
> modification of replacing readb/writeb methods with readl/writel. So I didn't
> want to duplicate the code, but wanted to provide a general way to fix the
> problem potentially also for another platforms.
> 
> Since you don't like this fix alternatively I'd suggest to add the reg_width
> parameter passed to the setup_8250_early_printk_port() method like this:
> -setup_8250_early_printk_port(unsigned long base, unsigned int reg_shift,
> -                             unsigned int timeout)
> +setup_8250_early_printk_port(unsigned long base, unsigned int reg_shift,
> +                             unsigned int reg_width, unsigned int timeout)
> 
> By reg_width parameter we could determine the actual width of the register:
>  static inline u8 serial_in(int offset)
>  {
> -       return readb(serial8250_base + (offset << serial8250_reg_shift));
> +       u8 ret = 0xFF;
> +
> +       offset <<= serial8250_reg_shift;
> +       switch (serial8250_reg_width) {
> +       case 1:
> +               ret = readb(serial8250_base + offset);
> +               break;
> +       case 2:
> +               ret = readw(serial8250_base + offset);
> +               break;
> +       case 4:
> +               ret = readl(serial8250_base + offset);
> +               break;
> +       default:
> +               break;
> +       }
> +
> +       return ret;
>  }
> 
> The similar modification will be implemented for serial_out(). I'll also modify

look at the lines of code you are adding. Doing your own prom_putchar will
probably have less lines.

> What do you think about this?

please do your own prom_putchar.


> > 
> > > ├─>[PATCH v2 12/20] mips: MAAR: Add XPA mode support
> > 
> > looks ok so far.
> 
> Can I add your Reviewed-by tag there then?

As I'm the maintainer of the part, I've simply applied it.

> > 
> > > ├─>[PATCH v2 10/20] mips: Add CONFIG/CONFIG6/Cause reg fields macro
> > 
> > that is fine
> 
> Can I add your Reviewed-by tag there then?

As this didn't apply cleanly, I'll apply it after you've resent it.
IMHO no need for a Reviewed-by.

> > > └─>[PATCH v2 09/20] mips: Add CP0 Write Merge config support
> > 
> > this is IMHO a dangerous change. Enabling write merging for any
> > CPU supporting it might triggers bugs. Do it in your board bringup
> > code and at the moment I don't see a reason for the rest of that
> > patch.
> 
> Let's at least leave the mm_config() implementation but without the write-merge
> enabling by default. Providing features availability macro
> cpu_has_mm_sysad/cpu_has_mm_full and c0 config fields

do you have a user of that ? I'm not introducing code nobody uses.

> I could use them to implement a code pattern like:
> 
> +	if (cpu_has_mm_full) {
> +		unsigned int config0 = read_c0_config();
> +               config0 = (config0 & ~MIPS_CONF_MM) | MIPS_CONF_MM_FULL;
> +               write_c0_config(config0);
> +	}

you know you are running on a R5 core, so you know you have MM_FULL.
No need to check this.

> By doing so I can manually enable/disable the MM feature in the
> cpu-feature-overrides.h. Without that I'd have to locally define these macro,
> which isn't good seeing they are in fact generic and can be useful for other
> platforms with SYSAD and FULL MM feature available. What do you think?

To me this is a hardware feature I expect to be done by firmware and
Linux shouldn't care about it, if it doesn't have any software
implications.

Thomas.

-- 
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea.                                                [ RFC1925, 2.3 ]

  reply	other threads:[~2020-05-19 16:00 UTC|newest]

Thread overview: 89+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-06 12:46 [PATCH 00/22] mips: Prepare MIPS-arch code for Baikal-T1 SoC support Sergey.Semin
2020-05-06 17:42 ` [PATCH v2 00/20] " Sergey.Semin
2020-05-06 17:42   ` [PATCH v2 01/20] dt-bindings: power: Convert mti,mips-cpc to DT schema Sergey.Semin
2020-05-14 15:09     ` Rob Herring
2020-05-14 18:04       ` Serge Semin
2020-05-06 17:42   ` [PATCH v2 02/20] dt-bindings: bus: Add MIPS CDMM controller Sergey.Semin
2020-05-14 15:09     ` Rob Herring
2020-05-14 18:05       ` Serge Semin
2020-05-06 17:42   ` [PATCH v2 03/20] dt-bindings: Add vendor prefix for Baikal Electronics, JSC Sergey.Semin
2020-05-06 17:55     ` Sam Ravnborg
2020-05-06 19:20       ` Serge Semin
2020-05-06 19:26         ` Sam Ravnborg
2020-05-06 20:18           ` Serge Semin
2020-05-14 18:13     ` Serge Semin
2020-05-14 18:31     ` Rob Herring
2020-05-06 17:42   ` [PATCH v2 04/20] mips: cm: Fix an invalid error code of INTVN_*_ERR Sergey.Semin
2020-05-07 11:10     ` Thomas Bogendoerfer
2020-05-07 21:32       ` Serge Semin
2020-05-06 17:42   ` [PATCH v2 05/20] mips: cm: Add L2 ECC/parity errors reporting Sergey.Semin
2020-05-07 11:17     ` Thomas Bogendoerfer
2020-05-07 21:38       ` Serge Semin
2020-05-06 17:42   ` [PATCH v2 06/20] mips: Add MIPS32 Release 5 support Sergey.Semin
2020-05-08 13:30     ` Thomas Bogendoerfer
2020-05-10 22:05       ` Serge Semin
2020-05-06 17:42   ` [PATCH v2 07/20] mips: Add MIPS Warrior P5600 support Sergey.Semin
2020-05-07 11:17     ` Thomas Bogendoerfer
2020-05-07 21:19       ` Serge Semin
2020-05-08  9:32         ` Thomas Bogendoerfer
2020-05-08 12:21           ` Thomas Bogendoerfer
2020-05-10 22:09             ` Serge Semin
2020-05-06 17:42   ` [PATCH v2 08/20] mips: Fix cpu_has_mips64r1/2 activation for MIPS32 CPUs Sergey.Semin
2020-05-08 13:28     ` Thomas Bogendoerfer
2020-05-10 23:59       ` Serge Semin
2020-05-06 17:42   ` [PATCH v2 09/20] mips: Add CP0 Write Merge config support Sergey.Semin
2020-05-06 17:42   ` [PATCH v2 10/20] mips: Add CONFIG/CONFIG6/Cause reg fields macro Sergey.Semin
2020-05-06 17:42   ` [PATCH v2 11/20] mips: MAAR: Use more precise address mask Sergey.Semin
2020-05-07 11:09     ` Thomas Bogendoerfer
2020-05-07 19:13       ` Serge Semin
2020-05-08  9:22         ` Thomas Bogendoerfer
2020-05-10 22:13           ` Serge Semin
2020-05-06 17:42   ` [PATCH v2 12/20] mips: MAAR: Add XPA mode support Sergey.Semin
2020-05-19 15:42     ` Thomas Bogendoerfer
2020-05-20 11:30       ` Serge Semin
2020-05-06 17:42   ` [PATCH v2 13/20] mips: early_printk_8250: Use offset-sized IO-mem accessors Sergey.Semin
2020-05-06 17:42   ` [PATCH v2 14/20] mips: Use offset-sized IO-mem accessors in CPS debug printout Sergey.Semin
2020-05-06 18:16     ` Sergei Shtylyov
2020-05-06 19:52       ` Serge Semin
2020-05-06 17:42   ` [PATCH v2 15/20] mips: cdmm: Add mti,mips-cdmm dtb node support Sergey.Semin
2020-05-06 17:42   ` [PATCH v2 16/20] bus: cdmm: Add MIPS R5 arch support Sergey.Semin
2020-05-06 17:42   ` [PATCH v2 17/20] mips: Add udelay lpj numbers adjustment Sergey.Semin
2020-05-08 12:15     ` Jiaxun Yang
2020-05-06 17:42   ` [PATCH v2 18/20] mips: csrc-r4k: Decrease r4k-clocksource rating if CPU_FREQ enabled Sergey.Semin
2020-05-08 15:41     ` Thomas Bogendoerfer
2020-05-11 13:31       ` Serge Semin
2020-05-15  7:48         ` Serge Semin
2020-05-15 21:06           ` Thomas Bogendoerfer
2020-05-16 11:55             ` Serge Semin
2020-05-18 13:48             ` Serge Semin
2020-05-18 16:32               ` Thomas Bogendoerfer
2020-05-18 20:57                 ` Serge Semin
2020-05-19 15:50                   ` Thomas Bogendoerfer [this message]
2020-05-20 11:59                     ` Serge Semin
2020-05-20 14:03                       ` Serge Semin
2020-05-20 18:40                       ` Thomas Bogendoerfer
2020-05-20 21:13                         ` Serge Semin
2020-05-20 12:12                     ` Serge Semin
2020-05-20 12:21                       ` Serge Semin
2020-05-20 13:38                       ` Thomas Bogendoerfer
2020-05-20 13:48                         ` Serge Semin
2020-05-20 18:30                           ` Thomas Bogendoerfer
2020-05-20 21:12                             ` Serge Semin
2020-05-06 17:42   ` [PATCH v2 19/20] mips: cevt-r4k: Update the r4k-clockevent frequency in sync with CPU Sergey.Semin
2020-05-08 15:40     ` Thomas Bogendoerfer
2020-05-11  0:34       ` Serge Semin
2020-05-06 17:42   ` [PATCH v2 20/20] cpufreq: Return zero on success in boost sw setting Sergey.Semin
2020-05-15 15:58     ` Rafael J. Wysocki
2020-05-16 12:52       ` Serge Semin
2020-05-18  7:41         ` Viresh Kumar
2020-05-18  9:53           ` Rafael J. Wysocki
2020-05-18 10:11             ` Viresh Kumar
2020-05-18 10:22               ` Rafael J. Wysocki
2020-05-18 10:24                 ` Viresh Kumar
2020-05-18 10:31                   ` Serge Semin
2020-05-18 10:41                     ` Rafael J. Wysocki
2020-05-18 10:46                       ` Serge Semin
2020-05-18 10:51                         ` Rafael J. Wysocki
2020-05-18 10:56                           ` Serge Semin
2020-05-18 11:05                             ` Rafael J. Wysocki
2020-05-19  1:50                               ` Xiongfeng Wang

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