From: Pratyush Yadav <me@yadavpratyush.com>
To: Mason Yang <masonccyang@mxic.com.tw>
Cc: broonie@kernel.org, tudor.ambarus@microchip.com,
miquel.raynal@bootlin.com, richard@nod.at, vigneshr@ti.com,
boris.brezillon@collabora.com, matthias.bgg@gmail.com,
juliensu@mxic.com.tw, linux-kernel@vger.kernel.org,
linux-spi@vger.kernel.org, linux-mtd@lists.infradead.org,
p.yadav@ti.com
Subject: Re: [PATCH v4 2/7] mtd: spi-nor: sfdp: parse xSPI Profile 1.0 table
Date: Fri, 29 May 2020 14:57:58 +0530 [thread overview]
Message-ID: <20200529092758.ezuyac2r6vmp6tfs@yadavpratyush.com> (raw)
In-Reply-To: <1590737775-4798-3-git-send-email-masonccyang@mxic.com.tw>
On 29/05/20 03:36PM, Mason Yang wrote:
> JESD251, xSPI profile 1.0 table supports octal DTR mode.
> Extract information like the fast read opcode, dummy cycles for various
> frequencies, the number of dummy cycles needed for a Read Status
> Register command, the number of address bytes needed for a Read
> Status Register command, read volatile register command and write
> volatile register command.
Like I said before, please don't re-introduce the functions. My patch
series already parses the table. Add whatever new feature you want on
top of it.
> According to BFPT 20th DWORD of octal maximum speed, driver get it's
> specific dummy cycles from profile 1.0 table and then could update
> it to device by their fixup hooks.
My patch [0] already find out the dummy cycles from the table as you
suggested, though it doesn't consult the BFPT. Instead, it uses the
dummy cycle fields themselves as indication that a speed is supported or
not.
[0] https://lore.kernel.org/linux-mtd/20200525091544.17270-10-p.yadav@ti.com/
--
Regards,
Pratyush Yadav
next prev parent reply other threads:[~2020-05-29 9:28 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-29 7:36 [PATCH v4 0/7] mtd: spi-nor: add xSPI Octal DTR support Mason Yang
2020-05-29 7:36 ` [PATCH v4 1/7] mtd: spi-nor: sfdp: get octal mode maximum speed from BFPT Mason Yang
2020-05-29 9:23 ` Pratyush Yadav
2020-06-02 6:32 ` masonccyang
2020-07-13 5:49 ` masonccyang
2020-10-27 16:57 ` Tudor.Ambarus
2020-05-29 7:36 ` [PATCH v4 2/7] mtd: spi-nor: sfdp: parse xSPI Profile 1.0 table Mason Yang
2020-05-29 9:27 ` Pratyush Yadav [this message]
2020-07-13 5:52 ` masonccyang
2020-10-27 17:19 ` Tudor.Ambarus
2020-05-29 7:36 ` [PATCH v4 3/7] mtd: spi-nor: sfdp: parse command sequences to change octal DTR mode Mason Yang
2020-07-13 5:55 ` masonccyang
2020-10-28 9:45 ` Tudor.Ambarus
2020-05-29 7:36 ` [PATCH v4 4/7] mtd: spi-nor: core: add configuration register 2 read & write support Mason Yang
2020-07-13 5:56 ` masonccyang
2020-10-28 10:18 ` Tudor.Ambarus
2020-05-29 7:36 ` [PATCH v4 5/7] mtd: spi-nor: core: execute command sequences to change octal DTR mode Mason Yang
2020-07-13 5:57 ` masonccyang
2020-05-29 7:36 ` [PATCH v4 6/7] spi: mxic: patch for octal DTR mode support Mason Yang
2020-07-13 5:58 ` masonccyang
2020-05-29 7:36 ` [PATCH v4 7/7] mtd: spi-nor: macronix: Add Octal 8D-8D-8D supports for Macronix mx25uw51245g Mason Yang
2020-05-29 9:42 ` Pratyush Yadav
2020-06-02 6:44 ` masonccyang
2020-06-03 5:53 ` Pratyush Yadav
2020-06-05 2:53 ` masonccyang
2020-06-05 7:47 ` Pratyush Yadav
2020-07-13 5:59 ` masonccyang
2020-10-28 10:25 ` Tudor.Ambarus
2020-05-29 9:13 ` [PATCH v4 0/7] mtd: spi-nor: add xSPI Octal DTR support Pratyush Yadav
2020-07-13 5:47 ` masonccyang
2020-10-28 10:42 ` Tudor.Ambarus
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