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From: Marc Zyngier <maz@kernel.org>
To: Thomas Gleixner <tglx@linutronix.de>
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
	Anup Patel <anup.patel@wdc.com>,
	Atish Patra <atish.patra@wdc.com>,
	Bartosz Golaszewski <bgolaszewski@baylibre.com>,
	Dan Carpenter <dan.carpenter@oracle.com>,
	Ingo Rohloff <ingo.rohloff@lauterbach.com>,
	Jiaxun Yang <jiaxun.yang@flygoat.com>,
	John Garry <john.garry@huawei.com>,
	Jonathan Cameron <Jonathan.Cameron@huawei.com>,
	Linus Walleij <linus.walleij@linaro.org>,
	Palmer Dabbelt <palmerdabbelt@google.com>,
	Rob Herring <robh@kernel.org>,
	Shaokun Zhang <zhangshaokun@hisilicon.com>,
	Valentin Schneider <valentin.schneider@arm.com>,
	"Wesley W. Terpstra" <wesley@sifive.com>,
	Jason Cooper <jason@lakedaemon.net>,
	linux-kernel@vger.kernel.org
Subject: [GIT PULL] irqchip updates for Linux 5.8
Date: Fri, 29 May 2020 13:32:29 +0100	[thread overview]
Message-ID: <20200529123229.892699-1-maz@kernel.org> (raw)

Hi Thomas,

Here is this merge window's crop of irqchip/irqdomain updates, a
pretty quiet one (which nobody will complain about).

On the menu this time, a handful of MIPS drivers, some welcome
cleanups for irqdomain and irq_sim, the long overdue fixes for GICv3
ITS LPI balancing and managed MSIs, a set of fixes for the rather
experimental multi-PLIC setup, and various cleanups.

Note that the irq_sim updates change files in the IIO and GPIO
subsystem, for which the respective maintainers have given their Ack.

Please pull,

	M.

The following changes since commit 2ef96a5bb12be62ef75b5828c0aab838ebb29cb8:

  Linux 5.7-rc5 (2020-05-10 15:16:58 -0700)

are available in the Git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git tags/irqchip-5.8

for you to fetch changes up to da10a4b626657387845f32d37141fc7d48ebbdb3:

  dt-bindings: interrupt-controller: Add Loongson PCH MSI (2020-05-29 09:42:19 +0100)

----------------------------------------------------------------
irqchip updates for Linux 5.8:

- A few new drivers for the Loongson MIPS platform (HTVEC, PIC, MSI)
- A cleanup of the __irq_domain_add() API
- A cleanup of the IRQ simulator to actually use some of
  the irq infrastructure
- Some fixes for the Sifive PLIC when used in a multi-controller
  context
- Fixes for the GICv3 ITS to spread interrupts according to the
  load of each CPU, and to honor managed interrupts
- Numerous cleanups and documentation fixes

----------------------------------------------------------------
Andy Shevchenko (3):
      irqdomain: Make __irq_domain_add() less OF-dependent
      irqdomain: Get rid of special treatment for ACPI in __irq_domain_add()
      irqdomain: Allow software nodes for IRQ domain creation

Anup Patel (3):
      irqchip/sifive-plic: Set default irq affinity in plic_irqdomain_map()
      irqchip/sifive-plic: Setup cpuhp once after boot CPU handler is present
      irqchip/sifive-plic: Improve boot prints for multiple PLIC instances

Bartosz Golaszewski (2):
      irqdomain: Make irq_domain_reset_irq_data() available to  non-hierarchical users
      genirq/irq_sim: Simplify the API

Dan Carpenter (1):
      iio: dummy_evgen: Fix use after free on error in iio_dummy_evgen_create()

Ingo Rohloff (1):
      irqchip/gic-v3: Fix missing "__init" for gic_smp_init()

Jiaxun Yang (6):
      irqchip: Add Loongson HyperTransport Vector support
      dt-bindings: interrupt-controller: Add Loongson HTVEC
      irqchip: Add Loongson PCH PIC controller
      dt-bindings: interrupt-controller: Add Loongson PCH PIC
      irqchip: Add Loongson PCH MSI controller
      dt-bindings: interrupt-controller: Add Loongson PCH MSI

Marc Zyngier (2):
      irqchip/gic-v3-its: Track LPI distribution on a per CPU basis
      irqchip/gic-v3-its: Balance initial LPI affinity across CPUs

Shaokun Zhang (1):
      platform-msi: Fix typos in comment

Valentin Schneider (1):
      irqchip/gic-v2, v3: Drop extra IRQ_NOAUTOEN setting for (E)PPIs

Wesley W. Terpstra (1):
      irqchip/sifive-plic: Remove incorrect requirement about number of irq contexts

 .../interrupt-controller/loongson,htvec.yaml       |  57 +++++
 .../interrupt-controller/loongson,pch-msi.yaml     |  62 +++++
 .../interrupt-controller/loongson,pch-pic.yaml     |  56 +++++
 drivers/base/platform-msi.c                        |   2 +-
 drivers/gpio/gpio-mockup.c                         |  53 +++-
 drivers/iio/dummy/iio_dummy_evgen.c                |  31 ++-
 drivers/irqchip/Kconfig                            |  27 +++
 drivers/irqchip/Makefile                           |   3 +
 drivers/irqchip/irq-gic-v3-its.c                   | 170 ++++++++++---
 drivers/irqchip/irq-gic-v3.c                       |   3 +-
 drivers/irqchip/irq-gic.c                          |   1 -
 drivers/irqchip/irq-loongson-htvec.c               | 214 +++++++++++++++++
 drivers/irqchip/irq-loongson-pch-msi.c             | 255 ++++++++++++++++++++
 drivers/irqchip/irq-loongson-pch-pic.c             | 243 +++++++++++++++++++
 drivers/irqchip/irq-sifive-plic.c                  |  23 +-
 include/linux/irq_sim.h                            |  33 +--
 include/linux/irqdomain.h                          |   2 +-
 kernel/irq/Kconfig                                 |   1 +
 kernel/irq/irq_sim.c                               | 267 +++++++++++++--------
 kernel/irq/irqdomain.c                             |  53 ++--
 20 files changed, 1336 insertions(+), 220 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/loongson,htvec.yaml
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/loongson,pch-msi.yaml
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml
 create mode 100644 drivers/irqchip/irq-loongson-htvec.c
 create mode 100644 drivers/irqchip/irq-loongson-pch-msi.c
 create mode 100644 drivers/irqchip/irq-loongson-pch-pic.c

                 reply	other threads:[~2020-05-29 12:32 UTC|newest]

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