From: Alexandre Ghiti <alex@ghiti.fr>
To: Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>, Zong Li <zong.li@sifive.com>,
Anup Patel <anup@brainfault.org>, Christoph Hellwig <hch@lst.de>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Cc: Alexandre Ghiti <alex@ghiti.fr>
Subject: [PATCH v2 3/8] riscv: Simplify MAXPHYSMEM config
Date: Wed, 3 Jun 2020 04:10:59 -0400 [thread overview]
Message-ID: <20200603081104.14004-4-alex@ghiti.fr> (raw)
In-Reply-To: <20200603081104.14004-1-alex@ghiti.fr>
Either the user specifies maximum physical memory size of 2GB or the
user lives with the system constraint which is 1/4th of maximum
addressable memory in Sv39 MMU mode (i.e. 128GB) for now.
Signed-off-by: Alexandre Ghiti <alex@ghiti.fr>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
arch/riscv/Kconfig | 20 ++++++--------------
1 file changed, 6 insertions(+), 14 deletions(-)
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 64b25a90d60f..e167f16131f4 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -106,7 +106,7 @@ config PAGE_OFFSET
default 0xC0000000 if 32BIT && MAXPHYSMEM_2GB
default 0x80000000 if 64BIT && !MMU
default 0xffffffff80000000 if 64BIT && MAXPHYSMEM_2GB
- default 0xffffffe000000000 if 64BIT && MAXPHYSMEM_128GB
+ default 0xffffffe000000000 if 64BIT && !MAXPHYSMEM_2GB
config ARCH_FLATMEM_ENABLE
def_bool y
@@ -223,19 +223,11 @@ config MODULE_SECTIONS
bool
select HAVE_MOD_ARCH_SPECIFIC
-choice
- prompt "Maximum Physical Memory"
- default MAXPHYSMEM_2GB if 32BIT
- default MAXPHYSMEM_2GB if 64BIT && CMODEL_MEDLOW
- default MAXPHYSMEM_128GB if 64BIT && CMODEL_MEDANY
-
- config MAXPHYSMEM_2GB
- bool "2GiB"
- config MAXPHYSMEM_128GB
- depends on 64BIT && CMODEL_MEDANY
- bool "128GiB"
-endchoice
-
+config MAXPHYSMEM_2GB
+ bool "Maximum Physical Memory 2GiB"
+ default y if 32BIT
+ default y if 64BIT && CMODEL_MEDLOW
+ default n
config SMP
bool "Symmetric Multi-Processing"
--
2.20.1
next prev parent reply other threads:[~2020-06-03 8:14 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-03 8:10 [PATCH v2 0/8] Introduce sv48 support Alexandre Ghiti
2020-06-03 8:10 ` [PATCH v2 1/8] riscv: Get rid of compile time logic with MAX_EARLY_MAPPING_SIZE Alexandre Ghiti
2020-06-03 8:10 ` [PATCH v2 2/8] riscv: Allow to dynamically define VA_BITS Alexandre Ghiti
2020-06-03 8:10 ` Alexandre Ghiti [this message]
2020-06-03 8:11 ` [PATCH v2 4/8] riscv: Prepare ptdump for vm layout dynamic addresses Alexandre Ghiti
2020-06-03 8:11 ` [PATCH v2 5/8] riscv: Implement sv48 support Alexandre Ghiti
2020-06-27 12:30 ` Nick Kossifidis
2020-06-27 14:26 ` Alex Ghiti
2020-06-03 8:11 ` [PATCH v2 6/8] riscv: Allow user to downgrade to sv39 when hw supports sv48 Alexandre Ghiti
2020-06-03 8:11 ` [PATCH v2 7/8] riscv: Use pgtable_l4_enabled to output mmu type in cpuinfo Alexandre Ghiti
2020-06-03 8:11 ` [PATCH v2 8/8] riscv: Explicit comment about user virtual address space size Alexandre Ghiti
2020-06-18 5:37 ` [PATCH v2 0/8] Introduce sv48 support Alex Ghiti
2020-06-18 21:54 ` Palmer Dabbelt
2020-07-01 18:27 ` Palmer Dabbelt
2020-07-03 5:22 ` Alex Ghiti
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