From: Andrew Lunn <andrew@lunn.ch>
To: Sascha Hauer <s.hauer@pengutronix.de>
Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
kernel@pengutronix.de
Subject: Re: [PATCH] net: mvneta: Fix Serdes configuration for 2.5Gbps modes
Date: Tue, 9 Jun 2020 15:28:48 +0200 [thread overview]
Message-ID: <20200609132848.GA1076317@lunn.ch> (raw)
In-Reply-To: <20200609131152.22836-1-s.hauer@pengutronix.de>
On Tue, Jun 09, 2020 at 03:11:52PM +0200, Sascha Hauer wrote:
> The Marvell MVNETA Ethernet controller supports a 2.5Gbps SGMII mode
> called DRSGMII. Depending on the Port MAC Control Register0 PortType
> setting this seems to be either an overclocked SGMII mode or 2500BaseX.
>
> This patch adds the necessary Serdes Configuration setting for the
> 2.5Gbps modes. There is no phy interface mode define for overclocked
> SGMII, so only 2500BaseX is handled for now.
>
> As phy_interface_mode_is_8023z() returns true for both
> PHY_INTERFACE_MODE_1000BASEX and PHY_INTERFACE_MODE_2500BASEX we
> explicitly test for 1000BaseX instead of using
> phy_interface_mode_is_8023z() to differentiate the different
> possibilities.
Hi Sascha
This seems like it should have a Fixes: tag, and be submitted to the
net tree. Please see the Networking FAQ.
Otherwise it looks O.K.
Andrew
next prev parent reply other threads:[~2020-06-09 13:28 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-09 13:11 Sascha Hauer
2020-06-09 13:28 ` Andrew Lunn [this message]
2020-06-10 6:26 ` Sascha Hauer
2020-06-10 15:24 ` Florian Fainelli
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