From: Andy Shevchenko <andriy.shevchenko@intel.com>
To: Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com>
Cc: kishon@ti.com, vkoul@kernel.org, robh+dt@kernel.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
adrian.hunter@intel.com
Subject: Re: [RESEND v5 2/2] phy: intel: Add Keem Bay eMMC PHY support
Date: Wed, 17 Jun 2020 17:01:07 +0300 [thread overview]
Message-ID: <20200617140107.GF2428291@smile.fi.intel.com> (raw)
In-Reply-To: <20200616233252.15619-3-wan.ahmad.zainie.wan.mohamad@intel.com>
On Wed, Jun 17, 2020 at 07:32:52AM +0800, Wan Ahmad Zainie wrote:
> Add support for eMMC PHY on Intel Keem Bay SoC.
...
> + ret = regmap_read_poll_timeout(priv->syscfg, PHY_STAT,
> + dllrdy, IS_DLLRDY(dllrdy),
> + 0, 50 * USEC_PER_MSEC);
> + if (ret) {
> + dev_err(&phy->dev, "dllrdy failed, ret=%d\n", ret);
> + return ret;
> + }
> +
> + return ret;
> +}
This has no changes.
Are you sure the version is correct?
--
With Best Regards,
Andy Shevchenko
next prev parent reply other threads:[~2020-06-17 14:01 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-16 23:32 [RESEND v5 0/2] " Wan Ahmad Zainie
2020-06-16 23:32 ` [RESEND v5 1/2] dt-bindings: phy: intel: Add Keem Bay eMMC PHY bindings Wan Ahmad Zainie
2020-06-16 23:32 ` [RESEND v5 2/2] phy: intel: Add Keem Bay eMMC PHY support Wan Ahmad Zainie
2020-06-17 14:01 ` Andy Shevchenko [this message]
2020-06-19 3:17 ` Wan Mohamad, Wan Ahmad Zainie
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