From: Borislav Petkov <bp@alien8.de>
To: Gyan Gupta <gyan.gupta@intel.com>
Cc: x86-ml <x86@kernel.org>,
Linus Torvalds <torvalds@linux-foundation.org>,
lkml <linux-kernel@vger.kernel.org>,
Sean Christopherson <sean.j.christopherson@intel.com>,
Tony Luck <tony.luck@intel.com>
Subject: Re: [PATCH -v2] x86/msr: Filter MSR writes
Date: Mon, 22 Jun 2020 17:19:51 +0200 [thread overview]
Message-ID: <20200622151951.GF32200@zn.tnic> (raw)
In-Reply-To: <1592835748-4589-1-git-send-email-gyan.gupta@intel.com>
On Mon, Jun 22, 2020 at 07:52:28PM +0530, Gyan Gupta wrote:
> I am also working on a similar functionality where we allow specific
> MSRs(whitelisted MSRs) to be allowed to read & write. Additionally,
> writes are subjected to checks where only certain bits can be allowed
> to be modified. This is to increase security & safety of system.
>
> For example, MCi_CTL can be used to enable/disable error reporting
> of hw unit. So in our use case once error reporting is enabled, it
> must not be disabled. Also we want to have restrictions on rdmsr for
> security purposes.
IInstead of defining whitelists, you should design proper interfaces
through sysfs or so which control the functionality you want.
If you want to do some internal testing, you don't need the whitelists
either - you simply enable writing to all MSRs like it is the case now.
--
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/notes-about-netiquette
next prev parent reply other threads:[~2020-06-22 15:19 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-22 14:22 Gyan Gupta
2020-06-22 15:19 ` Borislav Petkov [this message]
-- strict thread matches above, loose matches on Subject: below --
2020-06-12 10:50 [RFC PATCH] " Borislav Petkov
2020-06-13 15:48 ` [PATCH -v2] " Borislav Petkov
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