From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.1 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CEA49C433E0 for ; Wed, 1 Jul 2020 19:43:03 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A958B20760 for ; Wed, 1 Jul 2020 19:43:03 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=st.com header.i=@st.com header.b="LcA1o1uN" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726891AbgGATnC (ORCPT ); Wed, 1 Jul 2020 15:43:02 -0400 Received: from mx08-00178001.pphosted.com ([91.207.212.93]:45780 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1725875AbgGATnB (ORCPT ); Wed, 1 Jul 2020 15:43:01 -0400 Received: from pps.filterd (m0046661.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 061JWpd4019840; Wed, 1 Jul 2020 21:42:51 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=st.com; h=from : to : subject : date : message-id : mime-version : content-type; s=STMicroelectronics; bh=ONV0ecabbBlO6gJXNs/226URnc+ag+nvRZNReE3Ogcc=; b=LcA1o1uNTuYK6AJNKeorEZsug4z7ozOzOJHA6qEJWx9MHkmjLA73AETFI809FiJWOKaq nQMp2DoWo1Fl6I6MOZbC8fsH/tujwh5izRC0jjvZOGiP999k9e1t3b/djK4JogqJu1JY 7qKAg1YVYeW9hFq4JXWSrP0Dsok4HenjvIZ6ozKV2dwMFltwkss7V6A734yJlQI0dNNG cs6WOGQcM3xGTIhxAkYiQZJ3IZiKfgW1FREU4OxDVxVjLoTt2yFQxWKrSgQnc/facPFf jpn88IUb39gPHfFposVNCzF6aE63QSHkzXFcOYbPT6Hj/z76DEWmAhTkiGcZzc8eUiMP pg== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 31ww0gbym1-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 01 Jul 2020 21:42:51 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 83B3D100034; Wed, 1 Jul 2020 21:42:50 +0200 (CEST) Received: from Webmail-eu.st.com (sfhdag6node1.st.com [10.75.127.16]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 765252BF9A6; Wed, 1 Jul 2020 21:42:50 +0200 (CEST) Received: from localhost (10.75.127.50) by SFHDAG6NODE1.st.com (10.75.127.16) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Wed, 1 Jul 2020 21:42:49 +0200 From: Yannick Fertre To: Yannick Fertre , Philippe Cornu , Benjamin Gaignard , David Airlie , Daniel Vetter , Maxime Coquelin , Alexandre Torgue , , , , Subject: [PATCH] drm/bridge/synopsys: dsi: allow LP commands in video mode Date: Wed, 1 Jul 2020 21:42:48 +0200 Message-ID: <20200701194248.20368-1-yannick.fertre@st.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.75.127.50] X-ClientProxiedBy: SFHDAG2NODE3.st.com (10.75.127.6) To SFHDAG6NODE1.st.com (10.75.127.16) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.235,18.0.687 definitions=2020-07-01_10:2020-07-01,2020-07-01 signatures=0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Antonio Borneo Current code only sends LP commands in command mode. Allows sending LP commands also in video mode by setting the proper flag in DSI_VID_MODE_CFG. Signed-off-by: Antonio Borneo --- drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c b/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c index d580b2aa4ce9..0cd43e7a69bb 100644 --- a/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c +++ b/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c @@ -367,6 +367,13 @@ static void dw_mipi_message_config(struct dw_mipi_dsi *dsi, dsi_write(dsi, DSI_LPCLK_CTRL, lpm ? 0 : PHY_TXREQUESTCLKHS); dsi_write(dsi, DSI_CMD_MODE_CFG, val); + + val = dsi_read(dsi, DSI_VID_MODE_CFG); + if (lpm) + val |= ENABLE_LOW_POWER_CMD; + else + val &= ~ENABLE_LOW_POWER_CMD; + dsi_write(dsi, DSI_VID_MODE_CFG, val); } static int dw_mipi_dsi_gen_pkt_hdr_write(struct dw_mipi_dsi *dsi, u32 hdr_val) -- 2.17.1