From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2CF15C433E0 for ; Tue, 7 Jul 2020 19:16:42 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 14B94206F6 for ; Tue, 7 Jul 2020 19:16:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728701AbgGGTQl (ORCPT ); Tue, 7 Jul 2020 15:16:41 -0400 Received: from mga01.intel.com ([192.55.52.88]:5637 "EHLO mga01.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728663AbgGGTQj (ORCPT ); Tue, 7 Jul 2020 15:16:39 -0400 IronPort-SDR: zD2Y3l9N0TdbLfbm6eQVFxVYIkVHy6IsP1OfNksdqhY9LDIHHyCwZrOh1MbXhZT8oIK23jJ+kw B7qC2TdbGmZA== X-IronPort-AV: E=McAfee;i="6000,8403,9675"; a="165752998" X-IronPort-AV: E=Sophos;i="5.75,324,1589266800"; d="scan'208";a="165752998" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Jul 2020 12:16:38 -0700 IronPort-SDR: 2A4qNl2xB4s5LGy7ZTxWCqUDjEifAnZDy5qv1Kka0MGuyK5zhvYydOzQUvSwESWI6qdURYBXpM 7ZzuivkUJ2kg== X-IronPort-AV: E=Sophos;i="5.75,324,1589266800"; d="scan'208";a="388601636" Received: from mrtorger-mobl1.amr.corp.intel.com (HELO pbossart-mobl3.amr.corp.intel.com) ([10.254.77.62]) by fmsmga001-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Jul 2020 12:16:37 -0700 From: Pierre-Louis Bossart To: alsa-devel@alsa-project.org Cc: tiwai@suse.de, broonie@kernel.org, Lee Jones , zhong jiang , Ola Lilja , Roger Nilsson , Sandeep Kaushik , Pierre-Louis Bossart , Liam Girdwood , Jaroslav Kysela , Takashi Iwai , linux-kernel@vger.kernel.org (open list) Subject: [PATCH v3 05/10] ASoC: ux500: ux500_msp_i2s: Remove unused variables 'reg_val_DR' and 'reg_val_TSTDR' Date: Tue, 7 Jul 2020 14:16:10 -0500 Message-Id: <20200707191615.98296-6-pierre-louis.bossart@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200707191615.98296-1-pierre-louis.bossart@linux.intel.com> References: <20200707191615.98296-1-pierre-louis.bossart@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Lee Jones Looks like these have been unchecked since the driver's inception in 2012. Fixes the following W=1 kernel build warning(s): sound/soc/ux500/ux500_msp_i2s.c: In function ‘flush_fifo_rx’: sound/soc/ux500/ux500_msp_i2s.c:398:6: warning: variable ‘reg_val_DR’ set but not used [-Wunused-but-set-variable] sound/soc/ux500/ux500_msp_i2s.c: In function ‘flush_fifo_tx’: sound/soc/ux500/ux500_msp_i2s.c:415:6: warning: variable ‘reg_val_TSTDR’ set but not used [-Wunused-but-set-variable] Cc: zhong jiang Cc: Ola Lilja Cc: Roger Nilsson Cc: Sandeep Kaushik Signed-off-by: Lee Jones Signed-off-by: Pierre-Louis Bossart --- sound/soc/ux500/ux500_msp_i2s.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/sound/soc/ux500/ux500_msp_i2s.c b/sound/soc/ux500/ux500_msp_i2s.c index 394d8b2a4a16..fd0b88bb7921 100644 --- a/sound/soc/ux500/ux500_msp_i2s.c +++ b/sound/soc/ux500/ux500_msp_i2s.c @@ -395,7 +395,7 @@ static int enable_msp(struct ux500_msp *msp, struct ux500_msp_config *config) static void flush_fifo_rx(struct ux500_msp *msp) { - u32 reg_val_DR, reg_val_GCR, reg_val_FLR; + u32 reg_val_GCR, reg_val_FLR; u32 limit = 32; reg_val_GCR = readl(msp->registers + MSP_GCR); @@ -403,7 +403,7 @@ static void flush_fifo_rx(struct ux500_msp *msp) reg_val_FLR = readl(msp->registers + MSP_FLR); while (!(reg_val_FLR & RX_FIFO_EMPTY) && limit--) { - reg_val_DR = readl(msp->registers + MSP_DR); + readl(msp->registers + MSP_DR); reg_val_FLR = readl(msp->registers + MSP_FLR); } @@ -412,7 +412,7 @@ static void flush_fifo_rx(struct ux500_msp *msp) static void flush_fifo_tx(struct ux500_msp *msp) { - u32 reg_val_TSTDR, reg_val_GCR, reg_val_FLR; + u32 reg_val_GCR, reg_val_FLR; u32 limit = 32; reg_val_GCR = readl(msp->registers + MSP_GCR); @@ -421,7 +421,7 @@ static void flush_fifo_tx(struct ux500_msp *msp) reg_val_FLR = readl(msp->registers + MSP_FLR); while (!(reg_val_FLR & TX_FIFO_EMPTY) && limit--) { - reg_val_TSTDR = readl(msp->registers + MSP_TSTDR); + readl(msp->registers + MSP_TSTDR); reg_val_FLR = readl(msp->registers + MSP_FLR); } writel(0x0, msp->registers + MSP_ITCR); -- 2.25.1